• Title/Summary/Keyword: amorphous layer

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Electrical Characteristics of $(Ba,Sr)TiO_3/RuO_2$ Thin films

  • Park Chi-Sun
    • Journal of the Microelectronics and Packaging Society
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    • v.11 no.3 s.32
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    • pp.63-70
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    • 2004
  • The structural, electrical properties of $(Ba, Sr)TiO_3[BSTO]/RuO_2$ thin films were examined by the addition of amorphous BSTO layer between crystlline BSTO film and $RuO_2$ substrate. We prepared BSTO films with double-layered structure, that is, amorphous layers deposited at $60^{\circ}C$ and crystalline films. Crystalline films were prepared at 550 on amorphous BSTO layer. The thickness of the amorphous layers was varied from 0 to 170 nm. During the deposition of crystalline films, the crystallization of the amorphous layers occurred and the structure was changed to circular while crystalline BSTO films showed columnar structure. Due to insufficient annealing effect, amorphous BSTO phase was observed when the thickness of the amorphous layers exceeded 30 nm. Amorphous BSTO layer could also prevent the formation of oxygen deficient region in $RuO_2$ surface. Leakage current of total BSTO films decreased with increasing amorphous layer thickness due to structural modifications. Dielectric constant showed maxi-mum value of 343 when amorphous layer thickness was 30 nm at which the improvement by grain growth and the degradation by amorphous phase were balanced.

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A Novel Hydrogen-reduced P-type Amorphous Silicon Oxide Buffer Layer for Highly Efficient Amorphous Silicon Thin Film Solar Cells (고효율 실리콘 박막태양전지를 위한 신규 수소저감형 비정질실리콘 산화막 버퍼층 개발)

  • Kang, Dong-Won
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.65 no.10
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    • pp.1702-1705
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    • 2016
  • We propose a novel hydrogen-reduced p-type amorphous silicon oxide buffer layer between $TiO_2$ antireflection layer and p-type silicon window layer of silicon thin film solar cells. This new buffer layer can protect underlying the $TiO_2$ by suppressing hydrogen plasma, which could be made by excluding $H_2$ gas introduction during plasma deposition. Amorphous silicon oxide thin film solar cells with employing the new buffer layer exhibited better conversion efficiency (8.10 %) compared with the standard cell (7.88 %) without the buffer layer. This new buffer layer can be processed in the same p-chamber with in-situ mode before depositing main p-type amorphous silicon oxide window layer. Comparing with state-of-the-art buffer layer of AZO/p-nc-SiOx:H, our new buffer layer can be processed with cost-effective, much simple process based on similar device performances.

Effect of p-type a-SiO:H buffer layer at the interface of TCO and p-type layer in hydrogenated amorphous silicon solar cells

  • Kim, Youngkuk;Iftiquar, S.M.;Park, Jinjoo;Lee, Jeongchul;Yi, Junsin
    • Journal of Ceramic Processing Research
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    • v.13 no.spc2
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    • pp.336-340
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    • 2012
  • Wide band gap p-type hydrogenated amorphous silicon oxide (a-SiO:H) buffer layer has been used at the interface of transparent conductive oxide (TCO) and hydrogenated amorphous silicon (a-Si:H) p-type layer of a p-i-n type a-Si:H solar cell. Introduction of 5 nm thick buffer layer improves in blue response of the cell along with 0.5% enhancement of photovoltaic conversion efficiency (η). The cells with buffer layer show higher open circuit voltage (Voc), fill factor (FF), short circuit current density (Jsc) and improved blue response with respect to the cell without buffer layer.

Fabrication and Characterization of Cu-based Amorphous Coatings by Cold Spray Process (저온 분사를 이용한 Cu계 비정질 코팅층의 제조 및 특성 연구)

  • Jung, Dong-jin;Park, Dong-Yong;Lee, Jin Kyu;Kim, Hyung Jun;Lee, Kee-Ahn
    • Korean Journal of Metals and Materials
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    • v.46 no.5
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    • pp.321-327
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    • 2008
  • Cu based amorphous ($Cu_{54}Zr_{22}Ti_{18}Ni_6$) coating was produced by cold spraying as a new fabrication process. The microstructure and macroscopic properties of amorphous coating layer was investigated and compared with those of cold sprayed pure Cu coating. Amorphous powders were prepared by gas atomization and Al 6061 was used as the substrate plate. X-ray diffraction results showed that Cu based amorphous powder could be successfully deposited by cold spraying without any crystallization. The Cu based amorphous coating layer ($300{\sim}400{\mu}m$ thickness) contained 4.87% porosity. The hardness of Cu based amorphous coating represented $412.8H_v$, which was correspond to 68% of the hardness of injection casted bulk amorphous material. The wear resistance of Cu based amorphous coating was found to be three times higher than that of pure Cu coating. The 3-point bending test results showed that the adhesion strength of Cu based amorphous coating layer was higher than that pure Cu coating. It was also observed that hard Cu base amorphous particle could easily deform soft substrate by particle collisions and thus generated strong adhesion between coating and substrate. However, the amorphous coating layer unexpectedly represented lower corrosion resistance than pure Cu coating, which might be resulted from the higher content of porosity in the cold sprayed amorphous coating.

The nonvolatile memory device of amorphous silicon transistor (비정질실리콘 박막트랜지스터 비휘발성 메모리소자)

  • Hur, Chang-Wu;Park, Choon-Shik
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.13 no.6
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    • pp.1123-1127
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    • 2009
  • This paper expands the scope of application of the thin film transistor (TFT) in which it is used as the switching element by making the amorphous silicon TFT with the non-volatile memory device,. It is the thing about the amorphous silicon non-volatile memory device which is suitable to an enlargement and in which this uses the additionally cheap substrate according to the amorphous silicon use. As to, the amorphous silicon TFT non-volatile memory device is comprised of the glass substrates and the gate, which evaporates on the glass substrates and in which it patterns the first insulation layer, in which it charges the gate the floating gate which evaporates on the first insulation layer and in which it patterns and the second insulation layer in which it charges the floating gate, and the active layer, in which it evaporates the amorphous silicon on the second insulation layer the source / drain layer which evaporates the n+ amorphous silicon on the active layer and in which it patterns and the source / drain layer electrode in which it evaporates on the source / drain layer.

Formation of Amorphous Oxide Layer on the Crystalline Al-Ni-Y Alloy

  • Kim, Kang Cheol;Kim, Won Tae;Kim, Do Hyang
    • Applied Microscopy
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    • v.43 no.4
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    • pp.173-176
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    • 2013
  • The oxidation behavior of the crystallized $Al_{87}Ni_3Y_{10}$ alloy has been investigated with an aim to compare with that of the amorphous $Al_{87}Ni_3Y_{10}$ alloy. The oxidation at 873 K occurs as follows: (1) growth of an amorphous aluminum-yttrium oxide layer (~10 nm) after heating up to 873 K; and (2) formation of $YAlO_3$ crystalline oxide (~220 nm) after annealing for 30 hours at 873 K. Such an overall oxidation step indicates that the oxidation behavior in the crystallized $Al_{87}Ni_3Y_{10}$ alloy occurs in the same way as in the amorphous $Al_{87}Ni_3Y_{10}$ alloy. The simultaneous presence of aluminum and yttrium in the oxide layer significantly enhances the thermal stability of the amorphous structure in the oxide phase. Since the structure of aluminum-yttrium oxide is dense due to the large difference in ionic radius between aluminum and yttrium ions, the diffusion of oxygen ion through the amorphous oxide layer is limited thus stabilizing the amorphous structure of the oxide phase.

Characterization of Poly-Si TFT's using Amorphous-$Si_xGe_y$ for Seed Layer (Amorphous-$Si_xGe_y$을 seed layer로 이용한 Poly-Si TFT의 특성)

  • Jung, Myung-Ho;Jung, Jong-Wan;Cho, Won-Ju
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2007.06a
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    • pp.125-126
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    • 2007
  • Polycrystalline silicon thin-film-transistors (Poly-Si TFT's) with a amorphous-$Si_xGe_y$ seed layer have been fabricated to improve the performance of TFT. The dependence of crystal structure and electrical characteristics on the the Ge fractions in $Si_xGe_y$ seed layer were investigated. As a result, the increase of grain size and enhancement of electrical characteristics were obtained from the poly-Si TFT's with amorphous-SixGey seed layer.

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Amorphous Carbon Films on Ni using with $CBr_4$ by Thermal Atomic Layer Deposition

  • Choe, Tae-Jin;Gang, Hye-Min;Yun, Jae-Hong;Jeong, Han-Eol;Kim, Hyeong-Jun
    • Proceedings of the Materials Research Society of Korea Conference
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    • 2011.10a
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    • pp.28.1-28.1
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    • 2011
  • We deposited the carbon films on Ni substrates by thermal atomic layer deposition (th-ALD), for the first time, using carbon tetrabromide ($CBr_4$) precursors and H2 reactants at two different temperatures (573 K and 673 K). Morphology of carbon films was characterized by scanning electron microscopy (SEM). The carbon films having amorphous carbon structures were analyzed by X-ray photoemission spectroscopy (XPS) and Raman spectroscopy. As the working temperature was increased from 573 K to 673 K, the intensity of C1s spectra was increased while that of O1s core spectra was reduced. That is, the purity of carbon films containing bromine (Br) atoms was increased. Also, the thin amorphous carbon films (ALD 3 cycle) were transformed to multilayer graphene segregated on Ni layer, through the post-annealing and cooling process.

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Direct Current (DC) Bias Stress Characteristics of a Bottom-Gate Thin-Film Transistor with an Amorphous/Microcrystalline Si Double Layer

  • Jeong, Tae-Hoon;Kim, Si-Joon;Kim, Hyun-Jae
    • Transactions on Electrical and Electronic Materials
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    • v.12 no.5
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    • pp.197-199
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    • 2011
  • In this paper, the bottom-gate thin-film transistors (TFTs) were fabricated with an amorphous/microcrystalline Si double layer (DL) as an active layer and the variations of the electrical characteristics were investigated according to the DC bias stresses. Since the fabrication process of DL TFTs was identical to that of the conventional amorphous Si (a-Si) TFTs, it creates no additional manufacturing cost. Moreover, the amorphous/microcrystalline Si DL could possibly improve stability and mass production efficiency. Although the field effect mobility of the typical DL TFTs is similar to that of a-Si TFTs, the DL TFTs had a higher reliability with respect to the direct current (DC) bias stresses.

The efficiency charateristics of intrinsic layer thickness dependence for amorphous silicon single junction solar cells (Intrinsic layer 두께 가변에 따른 단일접합 비정질 박막 태양전지의 효율 특성 변화)

  • Yoon, Ki-Chan;Kim, Young-Kook;Heo, Jong-Kyu;Choi, Hyung-Wook;Yi, Young-Suk;Yi, Jun-Sin
    • 한국신재생에너지학회:학술대회논문집
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    • 2009.06a
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    • pp.80-82
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    • 2009
  • The dependence of the efficiency characteristics of hydrogenated amorphous silicon single junction solar cells on the various intrinsic layer thickness has been investigate in the glass/$SnO_2$:F/p,i,n a-Si:H/Al type of amorphous silicon solar cells by cluster PECVD system. The open circuit voltage, short circuit current, fill factor and conversion efficiency have been measured under AM 1.5 condition. The result of the cell performance was improved about 8.2% due to an increase in the short circuit current.

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