• 제목/요약/키워드: amorphous TFTs

검색결과 197건 처리시간 0.031초

Characterization of a Solution-processed YHfZnO Gate Insulator for Thin-Film Transistors

  • Kim, Si-Joon;Kim, Dong-Lim;Kim, Doo-Na;Kim, Hyun-Jae
    • Journal of Information Display
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    • 제11권4호
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    • pp.165-168
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    • 2010
  • A solution-processed multicomponent oxide, yttrium hafnium zinc oxide (YHZO), was synthesized and deposited as a gate insulator. The YHZO film annealed at $600^{\circ}C$ contained an amorphous phase based on the results of thermogravimetry, differential thermal analysis, and X-ray diffraction. The electrical characteristics of the YHZO film were analyzed by measuring the leakage current. The high dielectric constant (16.4) and high breakdown voltage (71.6 V) of the YHZO films resulted from the characteristics of $HfO_2$ and $Y_2O_3$, respectively. To examine if YHZO can be applied to thin-film transistors (TFTs), indium gallium zinc oxide TFTs with a YHZO gate insulator were also fabricated. The desirable characteristics of the YHZO films when used as a gate insulator show that the limitations of the general binary-oxide-based materials and of the conventional vacuum processes can be overcome.

New Process Development for Hybrid Silicon Thin Film Transistor

  • Cho, Sung-Haeng;Choi, Yong-Mo;Jeong, Yu-Gwang;Kim, Hyung-Jun;Yang, Sung-Hoon;Song, Jun-Ho;Jeong, Chang-Oh;Kim, Shi-Yul
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2008년도 International Meeting on Information Display
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    • pp.205-207
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    • 2008
  • The new process for hybrid silicon thin film transistor (TFT) using DPSS laser has been developed for realizing both low-temperature poly-Si (LTPS) TFT and a-Si:H TFT on the same substrate as a backplane of active matrix liquid crystal display. LTPS TFTs are integrated on the peripheral area of the panel for gate driver integrated circuit and a-Si:H TFTs are used as a switching device for pixel in the active area. The technology has been developed based on the current a-Si:H TFT fabrication process without introducing ion-doping and activation process and the field effect mobility of $4{\sim}5\;cm^2/V{\cdot}s$ and $0.5\;cm^2/V{\cdot}s$ for each TFT was obtained. The low power consumption, high reliability, and low photosensitivity are realized compared with amorphous silicon gate driver circuit and are demonstrated on the 14.1 inch WXGA+ ($1440{\times}900$) LCD Panel.

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4.1” Transparent QCIF AMOLED Display Driven by High Mobility Bottom Gate a-IGZO Thin-film Transistors

  • Jeong, J.K.;Kim, M.;Jeong, J.H.;Lee, H.J.;Ahn, T.K.;Shin, H.S.;Kang, K.Y.;Park, J.S.;Yang, H,;Chung, H.J.;Mo, Y.G.;Kim, H.D.;Seo, H.
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2007년도 7th International Meeting on Information Display 제7권1호
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    • pp.145-148
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    • 2007
  • The authors report on the fabrication of thin film transistors (TFTs) that use amorphous indium-gallium-zinc oxide (a-IGZO) channel and have the channel length (L) and width (W) patterned by dry etching. To prevent the plasma damage of active channel, a 100-nm-thckness $SiO_{x}$ by PECVD was adopted as an etch-stopper structure. IGZO TFT (W/L=10/50${\mu}m$) fabricated on glass exhibited the high performance mobility of $35.8\;cm^2/Vs$, a subthreshold gate voltage swing of $0.59V/dec$, and $I_{on/off}$ of $4.9{\times}10^6$. In addition, 4.1” transparent QCIF active-matrix organic light-emitting diode display were successfully fabricated, which was driven by a-IGZO TFTs.

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ON/OFF 전류비를 향상시킨 새로운 bottom-gate 구조의 다결정 실리콘 박막 트랜지스터 (A Novel Bottom-Gate Poly-Si Thin Film Transistors with High ON/OFF Current Ratio)

  • 전재홍;최권영;박기찬;한민구
    • 대한전기학회논문지:전기물성ㆍ응용부문C
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    • 제48권5호
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    • pp.315-318
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    • 1999
  • We have proposed and fabricated the new bottom-gated polycrystalline silicon (poly-Si) thin film transistor (TFT) with a partial amorphous-Si region by employing the selective laser annealing. The channel layer of the proposed TFTs is composed of poly-Si region in the center and a-Si region in the edge. The TEM image shows that the local a-Si region is successfully fabricated by the effective cut out of the incident laser light in the upper a-Si layer. Our experimental results show that the ON/OFF current ratio is increased significantly by more than three orders in the new poly-Si TFT compared with conventional poly-Si TFT. The leakage current is decreased significantly due to the highly resistive a-Si re TFTs while the ON-series resistance of the local a-Si is reduced significantly due to the considerable inducement of electron carriers by the positive gate bias, so that the ON-current is not decreased much.

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Recent Advances in a-IGZO Thin Film Transistor Devices: A Short Review

  • Jingwen Chen;Fucheng Wang;Yifan Hu;Jaewoong Cho;Yeojin Jeong;Duy Phong Pham;Junsin Yi
    • 한국전기전자재료학회논문지
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    • 제36권5호
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    • pp.463-473
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    • 2023
  • In recent years, the transparent amorphous oxide thin film transistor represented by indium-gallium-zinc-oxide (IGZO) has become the first choice of the next generation of integrated circuit control components. This article contributes an overview of IGZO thin-film transistors (TFTs), including their fundamental principles and recent advancements. The paper outlines various TFT structures and places emphasis on the fabrication process of the active layer. The result showed that the size of the active layer including the length-to-width ratio and the width could have a significant effect on the mobility. And the process of TFT could influence the crystal structure of IGZO thin film. Furthermore, the article presents an overview of recent applications of IGZO TFTs, such as their use in display drivers and TFT memories. At last, the future development of IGZO TFT is forecasted in this paper.

Fabrication of IGZO-based Oxide TFTs by Electron-assisted Sputtering Process

  • 윤영준;조성환;김창열;남상훈;이학민;오종석;김용환
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2014년도 제46회 동계 정기학술대회 초록집
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    • pp.273.2-273.2
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    • 2014
  • Sputtering process has been widely used in Si-based semiconductor industry and it is also an ideal method to deposit transparent oxide materials for thin-film transistors (TFTs). The oxide films grown at low temperature by conventional RF sputtering process are typically amorphous state with low density including a large number of defects such as dangling bonds and oxygen vacancies. Those play a crucial role in the electron conduction in transparent electrode, while those are the origin of instability of semiconducting channel in oxide TFTs due to electron trapping. Therefore, post treatments such as high temperature annealing process have been commonly progressed to obtain high reliability and good stability. In this work, the scheme of electron-assisted RF sputtering process for high quality transparent oxide films was suggested. Through the additional electron supply into the plasma during sputtering process, the working pressure could be kept below $5{\times}10-4Torr$. Therefore, both the mean free path and the mobility of sputtered atoms were increased and the well ordered and the highly dense microstructure could be obtained compared to those of conventional sputtering condition. In this work, the physical properties of transparent oxide films such as conducting indium tin oxide and semiconducting indium gallium zinc oxide films grown by electron-assisted sputtering process will be discussed in detail. Those films showed the high conductivity and the high mobility without additional post annealing process. In addition, oxide TFT characteristics based on IGZO channel and ITO electrode will be shown.

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Transparent Oxide Thin Film Transistors with Transparent ZTO Channel and ZTO/Ag/ZTO Source/Drain Electrodes

  • Choi, Yoon-Young;Choi, Kwang-Hyuk;Kim, Han-Ki
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2011년도 제41회 하계 정기 학술대회 초록집
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    • pp.127-127
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    • 2011
  • We investigate the transparent TFTs using a transparent ZnSnO3 (ZTO)/Ag/ZTO multilayer electrode as S/D electrodes with low resistivity of $3.24{\times}10^{-5}$ ohm-cm, and high transparency of 86.29% in ZTO based TFTs. The Transparent TFTs (TTFTs) are prepared on glass substrate coated 100 nm of ITO thin film. On atomic layer deposited $Al_2\;O_3$, 50 nm ZTO layer is deposited by RF magnetron sputtering through a shadow mask for channel layer using ZTO target with 1 : 1 molar ratio of ZnO : $SnO_2$. The power of 100W, the working pressure of 2mTorr, and the gas flow of Ar 20 sccm during the ZTO deposition. After channel layer deposition, a ZTO (35 nm)/Ag (12 nm)/ZTO(35 nm) multilayer is deposited by DC/RF magnetron sputtering to form transparent S/D electrodes which are patterned through the shadow mask. Devices are annealed in air at 300$^{\circ}C$ for 30 min following ZTO deposition. Using UV/Visible spectrometer, the optical transmittances of the TTFT using ZTO/Ag/ ZTO multilayer electrodes are compared with TFT using Mo electrode. The structural properties of ZTO based TTFT with ZTO/Ag/ZTO multilayer electrodes are analyzed by high resolution transmission electron microscopy (HREM) and X-ray photoelectron spectroscopy (XPS). The transfer and output characterization of ZTO TTFTs are examined by a customized probe station with HP4145B system in are.

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영상센서를 위한 비정질 실리콘 박막트랜지스터의 제작 및 특성 (Fabrication and Characteristics of a-Si : H TFT for Image Sensor)

  • 김영진;박욱동;김기완;최규만
    • 센서학회지
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    • 제2권1호
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    • pp.95-99
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    • 1993
  • 영상 센서를 위한 비정질 실리콘 박막트랜지스터 (a-Si : HTFT)를 제작하고 그 동작 특성 을 조사하였다. 게이트 절연막으로는 비정질 실리콘 질화막(a-SiN : H)을 증착하였으며 소오스와 드레인 영역에서의 저항성 접합을 위해 $n^{+}$ 형 비정질 실리콘($n^{+}$-a-Si : H)을 증착하였다. 이 때 a-SiN : H막과 a-Si : H막의 두께는 각각 $2000{\AA}$, $n^{+}$-a-Si : H막의 두께는 $500{\AA}$이었다. 또한 a-Si : H TFT의 채널길이와 채널폭은 각각 $50{\mu}m$$1000{\mu}m$였다. 본 연구에서 제작한 a-Si : H TFT의 ON/OFF 전류비는 $10^{5}$, 문턱전압은 6.3 V 그리고 전계효과 이동도는 $0.15cm^{2}/V{\cdot}s$로 나타났다.

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Thermal Annealing Effects of Amorphous Ga-In-Zn-O Metal Point Contact Field Effect Transistor for Display Application

  • 이세원;정홍배;이영희;조원주
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2011년도 제41회 하계 정기 학술대회 초록집
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    • pp.252-252
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    • 2011
  • 최근 주목받고 있는 amorphous gallium-indium-zinc-oxide (a-GIZO) thin film transistors (TFTs)는 수소가 첨가된 비정질 실리콘 TFT에 비해 높은 이동도와 뛰어난 전기적, 광학적 특성에 의해 큰 주목을 받고 있다. 또한 넓은 밴드갭을 가지므로 가시광 영역에서 투명한 특성을 보이고, 플라스틱 기판 위에서 구부러지는 성질에 의해 플랫 패널 디스플레이나 능동 유기 발광소자 (AM-OLED), 투명 디스플레이에 응용되고 있다. 뿐만 아니라, 일반적인 Poly-Si TFT는 자체적으로 가지는 결정성에 의해 대면적화 시 균일성이 좋지 못하지만 GIZO는 비정질상 이기 때문에 백플레인의 대면적화에 유리하다는 장점이 있다. 이러한 TFT를 제작하기 전, 전기적 특성에 대한 정보를 얻거나 예측하는 것이 중요한데, 이에 따라 고안된 구조가 바로 metal point contact FET (pseudo FET)이다. pseudo FET은 소스/드레인 전극을 따로 증착할 필요 없이 채널을 증착한 후, 프로브 탐침을 채널의 표면에 적당한 압력으로 접촉시켜 전하를 공급하는 소스와 드레인처럼 동작시킬 수 있다. 따라서 소스/드레인을 증착하거나 lithography와 같은 추가적인 공정을 요구하지 않아 소자의 특성을 보다 간단하고 수월하게 분석할 수 있다는 장점이 있다. 본 연구에서는 p-type 기판위에 100nm의 oxidation SiO2를 게이트 절연막으로 사용하는 a-GIZO pseudo FET를 제작하였다. 소자 제작 후, 열처리 온도에 따른 전기적 특성을 분석하였고, 열처리 조건은 30분간 N2 분위기에서 실시하였다. 열처리 후 전기적 특성 분성 결과, 450oC에서 가장 낮은 subthreshold swing 값과 게이트 전압의 더블 스윕 후 문턱 전압의 변화가 거의 없음을 확인하였다.

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라만 분석을 통한 비정질 실리콘 박막의 고온 고상 결정화 거동 (Behavior of Solid Phase Crystallization of Amorphous Silicon Films at High Temperatures according to Raman Spectroscopy)

  • 홍원의;노재상
    • 한국표면공학회지
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    • 제43권1호
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    • pp.7-11
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    • 2010
  • Solid phase crystallization (SPC) is a simple method in producing a polycrystalline phase by annealing amorphous silicon (a-Si) in a furnace environment. Main motivation of the crystallization technique is to fabricate low temperature polycrystalline silicon thin film transistors (LTPS-TFTs) on a thermally susceptible glass substrate. Studies on SPC have been naturally focused to the low temperature regime. Recently, fabrication of polycrystalline silicon (poly-Si) TFT circuits from a high temperature polycrystalline silicon process on steel foil substrates was reported. Solid phase crystallization of a-Si films proceeds by nucleation and growth. After nucleation polycrystalline phase is propagated via twin mediated growth mechanism. Elliptically shaped grains, therefore, contain intra-granular defects such as micro-twins. Both the intra-granular and the inter-granular defects reflect the crystallinity of SPC poly-Si. Crystallinity and SPC kinetics of high temperatures were compared to those of low temperatures using Raman analysis newly proposed in this study.