• 제목/요약/키워드: aligned structure

검색결과 311건 처리시간 0.024초

자기정렬구조를 갖는 칼코겐화물 상변화 메모리 소자의 전기적 특성 및 온도 분포 (Electrical Characteristics of and Temperature Distribution in Chalcogenide Phase Change Memory Devices Having a Self-Aligned Structure)

  • 윤혜련;박영삼;이승윤
    • 한국전기전자재료학회논문지
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    • 제32권6호
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    • pp.448-453
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    • 2019
  • This work reports the electrical characteristics of and temperature distribution in chalcogenide phase change memory (PCM) devices that have a self-aligned structure. GST (Ge-Sb-Te) chalcogenide alloy films were formed in a self-aligned manner by interdiffusion between sputter-deposited Ge and $Sb_2Te_3$ films during thermal annealing. A transmission electron microscopy-energy dispersive X-ray spectroscopy (TEM-EDS) analysis demonstrated that the local composition of the GST alloy differed significantly and that a $Ge_2Sb_2Te_5$ intermediate layer was formed near the $Ge/Sb_2Te_3$ interface. The programming current and threshold switching voltage of the PCM device were much smaller than those of a control device; this implies that a phase transition occurred only in the $Ge_2Sb_2Te_5$ intermediate layer and not in the entire thickness of the GST alloy. It was confirmed by computer simulation, that the localized phase transition and heat loss suppression of the GST alloy promoted a temperature rise in the PCM device.

Pb-20wt%Cu 합금의 일방향 응고시 Cu 수지상 결정성장에 대한 시험편의 회전효과 (The Effects of Sample Rotation on Cu-Dendritic Growth During the Directional Solidification of Pb-20wt%Cu Alloy)

  • 김신우
    • 한국주조공학회지
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    • 제14권6호
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    • pp.508-513
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    • 1994
  • For Pb-20wt%Cu alloys, severe macrosegregation due to density difference of the resulting phases in normal directional solidification has been minimized and a uniformly aligned dendritic structure has been produced by axially rotating the sample of 5mm diameter in conjunction with horizontal directional solidification. Under the constant growth velocity of $20{\mu}m/sec$, increasing the rotation rate from 0.18 to 12rpm results in a transition from an aligned columnar to an equiaxed Cu-dendritic structure. With a constant rotation rate of 0.18rpm, increasing the growth velocity from 10 to $50{\mu}m/sec$ also has promoted a transition from columnar to equiaxed structure.

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Localization of Ultra-Low Frequency Waves in Multi-Ion Plasmas of the Planetary Magnetosphere

  • Kim, Eun-Hwa;Johnson, Jay R.;Lee, Dong-Hun
    • Journal of Astronomy and Space Sciences
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    • 제32권4호
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    • pp.289-295
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    • 2015
  • By adopting a 2D time-dependent wave code, we investigate how mode-converted waves at the Ion-Ion Hybrid (IIH) resonance and compressional waves propagate in 2D density structures with a wide range of field-aligned wavenumbers to background magnetic fields. The simulation results show that the mode-converted waves have continuous bands across the field line consistent with previous numerical studies. These waves also have harmonic structures in frequency domain and are localized in the field-aligned heavy ion density well. Our results thus emphasize the importance of a field-aligned heavy ion density structure for ultra-low frequency wave propagation, and suggest that IIH waves can be localized in different locations along the field line.

탄소 나노 튜브의 수직 배향에 대한 바이어스 인가 전압의 효과 (Effect of the Applied Bias Voltage on the Formation of Vertically Well-Aligned Carbon Nanotubes)

  • 김성훈
    • 한국재료학회지
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    • 제13권7호
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    • pp.415-419
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    • 2003
  • Carbon nanotubes were formed on silicon substrate using microwave plasma-enhanced chemical vapor deposition method. The possibility of carbon nanotubes formation was related to the thickness of nickel catalyst. The growth behavior of carbon nanotubes under the identical thickness of nickel catalyst was strongly dependent on the magnitude of the applied bias voltage. High negative bias voltage (-400 V) gave the vertically well-aligned carbon nanotubes. The vertically well-aligned carbon nanotubes have the multi-walled structure with nickel catalyst at the end position of the nanotubes.

불순물 농도에 따른 산화막 성장률의 차이를 이용한 자기 정렬된 금속게이트 MOSFET 구조 (A Self-Aligned Metal Gate MOSFET Structure Utilizing The Oxidation Rate Variation on The Impurity Concentration)

  • 고요환;최진호;김충기
    • 대한전기학회논문지
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    • 제36권7호
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    • pp.462-469
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    • 1987
  • A metal gate MOSFET with source/drain regions self-aligned to gate region is proposed. The proposed MOS transistor is fabricated by utilizing the higher oxidation rate of source/drain regions with high doping concentration when compared with channel region with moderate doping. The thick oxide on the source/drain regions reduces the gate and drain(source) overlap capacitance down to that of a self-aligned polysilicon gate device while allowing the use of a metal gate with much lower resistivity than the more commonly used polycrystalline silicon. A ring oscillator composed of 15 inverter stages has been computer simulated using SPICE. The results of the simulation show good agreement with experimental measurement confirming the fast switching speed of propesed MOSFET.

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Vertically Well-Aligned ZnO Nanowires on c-$Al_2O_3$ and GaN Substrates by Au Catalyst

  • Park, Hyun-Kyu;Oh, Myung-Hoon;Kim, Sang-Woo;Kim, Gil-Ho;Youn, Doo-Hyeob;Lee, Sun-Young;Kim, Sang-Hyeob;Kim, Ki-Chul;Maeng, Sung-Lyul
    • ETRI Journal
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    • 제28권6호
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    • pp.787-789
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    • 2006
  • In this letter, we report that vertically well-aligned ZnO nanowires were grown on GaN epilayers and c-plane sapphire via a vapor-liquid-solid process by introducing a 3 nm Au thin film as a catalyst. In our experiments, epitaxially grown ZnO nanowires on Au-coated GaN were vertically well-aligned, while nanowires normally tilted from the surface when grown on Au-coated c-$Al_2O_3$ substrates. However, pre-growth annealing of the Au thin layer on c-$Al_2O_3$ resulted in the growth of well-aligned nanowires in a normal surface direction. High-resolution transmission electron microscopy measurements showed that the grown nanowires have a hexagonal c-axis orientation with a single-crystalline structure.

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Photo Resistor Reflow 방법을 이용한 오프셋 마스크를 이용하지 않는 새로운 자기 정합 폴리 실리콘 박막 트랜지스터 (Self-aligned Offset Gated Poly-Si TFTs by Employing a Photo Resistor Reflow Process)

  • 박철민;민병혁;한민구
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1995년도 하계학술대회 논문집 C
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    • pp.1085-1087
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    • 1995
  • A large leakage current may be one of the critical issues for poly-silicon thin film transistors(poly-Si TFTs) for LCD applications. In order to reduce the leakage current of poly-Si TFTs, several offset gated structures have been reported. However, those devices, where the offset length in the source region is not same as that in the drain region, exhibit the asymmetric electrical performances such as the threshold voltage shift and the variation of the subthreshold slope. The different offset length is caused by the additional mask step for the conventional offset structures. Also the self-aligned implantation may not be applicable due to the mis-alignment problem. In this paper, we propose a new fabrication method for poly-Si TFTs with a self-aligned offset gated structure by employing a photo resistor reflow process. Compared with the conventional poly-Si TFTs, the device is consist of two gate electrodes, of which one is the entitled main gate where the gate bias is employed and the other is the entitled subgate which is separate from both sides of the main gate. The poly-Si channel layer below the offset oxide is protected from the injected ion impurities for the source/drain implantation and acts as an offset region of the proposed device. The key feature of our new device is the offset lesion due to the offset oxide. Our experimental results show that the offset region, due to the photo resistor reflow process, has been successfully obtained in order to fabricate the offset gated poly-Si TFTs. The advantages of the proposed device are that the offset length in the source region is the same as that in the drain region because of the self-aligned implantation and the proposed device does not require any additional mask process step.

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InP의 습식식각특성과 InP/lnGaAs HBT의 제작 (Wet etching charicteristics of InP in InP/InGaAs HBTs and their fabrication)

  • 김강대;박재홍;김용규;황성범;송정근
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2002년도 하계종합학술대회 논문집(2)
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    • pp.77-80
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    • 2002
  • In this paper, InP-based HBTs have been optimally designed by numerical simulation and fabricated by the self-aligned process. The structure of HBT was designed in terms of the current gain*f$_{max}$ for the base and f$_{T}$*f$_{max}$ for the collector. The designed structure produced the current gain of about 50 and the cutoff frequency and the maximum oscillation frequency of 87GHz and 2940Hz respectively. In addition, we present a study of the vertical and lateral etching of InP with the mask sides parallel to the principal crystallographic axes, [0101 and (001). This etching characteristics arc used to fabricate self-aligned HBT structures with reduced parasitic effects.s.s.s.

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Fast Switching of Vertically Aligned Liquid Crystals by Low-Temperature Curing of the Polymer Structure

  • Park, Byung Wok;Oh, Seung-Won;Kim, Jung-Wook;Yoon, Tae-Hoon
    • Journal of the Optical Society of Korea
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    • 제18권4호
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    • pp.395-400
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    • 2014
  • We proposed a method for fast turn-off switching of a vertically-aligned liquid crystal cell by low-temperature curing of the polymer structure. We confirmed that the turn-off times of the fabricated cells were reduced significantly as the curing temperature was lowered to $-20^{\circ}C$. We accounted for the effect of low-temperature curing on the turn-off time by using a mathematical model and by observing images obtained via scanning electron microscopy. We also confirmed that low-temperature curing is more effective in reducing the response time when the device is operated at a low temperature.