• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2007년도 7th International Meeting on Information Display 제7권2호
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• pp.1185-1188
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• 2007

The address discharge characteristics by the various scan-low and common-bias voltages are investigated based on measured address discharge time lags and $V_t$ close-curve analysis. The scan-low voltages are changed under the same voltage difference between the X and Y electrodes during an address period. As the voltage difference between the scan and address electrodes is increased during an address period, the address discharge time lag is shortened but the background luminance is increased. It is found that the improved address discharge characteristics is caused by the effect of the higher external applied voltage during an address period than the accumulated wall charges during a reset period and the high background luminance can be prevented by applying an address-bias voltage during a rising-ramp period and low reset voltage.

• 한국전기전자재료학회논문지
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• 제25권12호
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• pp.1004-1008
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• 2012

The effect of address discharge characteristics by selective reset method is investigated to prevent the weakness of address discharge in the middle of a TV-field without increase of the black luminance. To reduce black luminance in AC PDP usually, the first subfield during one TV frame adopted the conventional rising ramp-reset waveform, whereas the other subfields adopted the subsidiary reset waveform without rising ramp type. As the wall charge for the address discharge was accumulated by only the rising ramp waveform during the first reset period, the wall charge on three electrodes was disappeared as time passed and the address discharge would be weakened in the rear subfields. To prevent a reduction of the address discharge characteristics without decrease the black luminance, the modified rising ramp reset waveform was adopted only in the sixth subfield. As a result, a modified driving method could improve the address discharge characteristics compared with selective reset driving scheme with almost the same black luminance.

• Journal of Information Display
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• 제11권4호
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• pp.154-159
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• 2010

Single-sustainer driving is an AC PDP driving scheme to reduce the circuitry by maintaining the sustain electrode at ground level. To date, however, the research on the discharge characteristics in such driving scheme is insufficient. In this study, the panel performance and discharge characteristics of the single-sustainer driving scheme were observed while varying the address electrode condition. In single-sustainer driving, the address electrode is strongly involved in the sustain discharge when the former is maintained at ground level, and the dependence of the luminous efficacy on the sustain voltage is different from that in the conventional driving scheme. The dependence of the luminous efficacy on the sustain voltage appeared similar, however, to that in the conventional driving scheme when the address electrode was floated in single-sustainer driving. In the investigation of the temporal evolution of the sustain discharge using an IICCD camera, it was found that the sustain discharge in single-sustainer driving with a floating address electrode is similar to that in the conventional driving scheme, and the strong plasma formation region was located in the vicinity of the MgO surface, which seems to be related to the lifetime of a PDP with single-sustainer driving. In the investigation of the operation characteristics, the PDP that was operated with a floated address electrode showed a narrower dynamic operation margin, but a longer lifetime was expected.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2007년도 7th International Meeting on Information Display 제7권2호
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• pp.1181-1184
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• 2007

The new self-priming addressing driving scheme was proposed to improve an address discharge time lag. It utilizes the priming effect maintaining the priming ramp discharge during an address period and the address discharge time lag is significantly improved. In this study, the basic characteristics of the priming ramp discharge are presented.

• 한국전기전자재료학회논문지
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• 제25권11호
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• pp.906-909
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• 2012

The address discharge characteristics of a open dielectric structure compared with the conventional panel structure are investigated by measuring the discharge firing voltage. The open dielectric structure could easily produce the discharge between the scan and the sustain electrodes by erasing the dielectric layer between two electrodes. Due to the changes in the discharge firing characteristics of the open dielectric structure between the two sustain electrodes, the conventional reset waveform including the address waveform needs to be modified. The modified driving waveform suitable for the open dielectric structure is proposed and examined in AC PDP.

• 전자공학회논문지
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• 제50권3호
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• pp.174-178
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• 2013

플라즈마 디스플레이 패널에서 기입기간 동안 공통전극에서의 벽전하를 이용하여 기입방전특성을 향상시키기 위하여 수정된 구동 파형을 제시한다. 플라즈마 디스플레이의 구동방식에 있어서 초기화 기간 후에 상판의 두 전극에는 음전하가 쌓이게 되고 하판의 기입전극에는 양전하가 쌓이게 된다. 기입기간 중의 기입방전은 주사펄스와 기입펄스가 동시에 인가될 때 발생되는데 주사전극의 음전하와 기입전극의 양전하가 주로 이용된다. 반면에 공통 전극에서는 기입기간 동안 파형인가 없이 전압만 유지하기 때문에 공통전극의 벽전하는 크게 기여하지 않는다. 본 연구에서는 기입기간 중 주사 및 기입 펄스의 인가시각에 맞춰 공통 전극에서도 펄스를 인가하여 기입방전 특성을 조사하였다. 공통 전극에서의 인가전압의 높이와 펄스의 인가시각에 따른 기입 방전특성을 조사하는 실험을 각각 진행하였으며 그 결과 최적의 전압높이와 인가시각 조건하에서 기입방전의 발생시간을 종래보다 약 200 ns 정도 단축시켰다.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2007년도 7th International Meeting on Information Display 제7권1호
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• pp.613-616
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• 2007

Characteristics of dark image retention and address discharge time lag were investigated simultaneously. It was found that reset waveforms with low black luminance did not guarantee lower image retention. Improved address discharge time lag due to modified reset waveforms similarly did not show improved image retention. The address discharge time lag and the image retention are in a trade-off relation.

• 조명전기설비학회논문지
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• 제21권7호
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• pp.13-19
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• 2007

본 연구는 1,080개의 주사선수를 가지는 full-HD PDP를 위한 새로운 고속구동방식에 관한 것으로 고속 어드레스에 의한 표시방전의 방전특성을 고찰하여 새로운 구동방식의 특성을 평가하였다. 이 구동방식에서 어드레스 펄스의 폭이 좁아지면 최초 표시방전의 상대적 방전강도와 방전지연시간은 그 영향을 받는다. 어드레스 펄스의 인가위치의 변화는 방전강도와 무관하나 방전지연시간에는 영향을 미친다. 그러나 어드레스 펄스의 인가위치가 [$6{\mu}s$]이내이고 펄스의 폭이 [$0.7{\mu}s$]이내라면, 어드레스 펄스의 인가위치나 폭에 무관하게 안정된 표시방전을 유도할 수 있다. 실험결과로부터 폭이 좁은 어드레스 펄스를 사용하는 고속구동기술은 축적되는 벽전하의 부족으로 인해 공간전하의 영향에 매우 민감하다는 것을 알았다.

• 조명전기설비학회논문지
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• 제18권4호
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• pp.22-27
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• 2004

새로 제안된 기체방전 AND gate를 3전극 면방전 AC PDP에 적용하기 위하여 DC-AC floating 방전을 사용한 어드레스 방전 특성을 해석하였다. 실험결과 Y 전극을 floating 전극으로 한 floating 방전을 이용하여 어드레스 방전을 개시시킬 수 있었으며 표시방전을 유지시킬 수 있었다. 또한 floating 방전과 타이밍을 일치시켜 보조전극에 DC 프라이밍 방전을 일으켜 줌으로써 floating 방전 공간에 공간전하를 충분히 공급해 주어 그 결과 데이터 전압을 100(V)까지 낮출 수 있었다. 이 DC-AC floating 방전을 사용한 구동방식은 100(V)의 어드레스 동작마진을 얻을 수 있었다.

• 전기학회논문지
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• 제56권11호
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• pp.2004-2009
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• 2007

A new high-speed drive method for the plasma display panel is proposed. In this method, the address period is inserted for the rest period of the sustain pulses and the priming pulse is applied on the entire panel at the same time overlapping with the sustain period. The ramp shaped priming pulse can be made with a simple drive circuit in this technology and the stable sustain discharge can be induced even by a narrow scan pulse in help of the space charge generated from the address discharge. From the experiments, it is ascertained that the priming pulse hardly influences the sustain discharge. Moreover, the voltage margin of the sustain discharge is almost constant though that of the address discharge broadens with narrowing the scan pulse width. And, if the time interval between the scan pulse and the sustain pulse is within $6{\mu}s$, the voltage margin of the address and the sustain discharges are unaffected though the applied position of the scan pulse is changed. High-speed driving with the address pulse of $0.7{\mu}s$ width was achieved and the address voltage margin of 20V and the sustain voltage margin of 10V were obtained.