• Title/Summary/Keyword: adaptive loop filter

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Charge Pump PLL for Lock Time Improvement and Jitter Reduction (Lock Time 개선과 Jitter 감소를 위한 전하 펌프 PLL)

  • Lee, Seung-Jin;Choi, Pyung;Shin, Jang-Kyoo
    • Proceedings of the IEEK Conference
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    • 2003.07c
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    • pp.2625-2628
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    • 2003
  • Phase locked loops are widely used in many applications such as frequency synthesis, clock/data recovery and clock generation. In nearly all the PLL applications, low jitter and fast locking time is required. Without using adaptive loop filter, this paper proposes very simple method for improving locking time and jitter reduction simultaneously in charge pump PLL(CPPLL) using Daul Phase/Frequency Detector(Dual PFD). Based on the proposed scheme, the lock time is improved by 23.1%, and the jitter is reduced by 45.2% compared with typical CPPLL.

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CNN (Convolutional Neural Network) based in-loop filter in HEVC (컨볼루션 신경망을 이용한 고효율 비디오 부호화에서의 인-루프 필터)

  • Park, Woonsung;Kim, Munchurl
    • Proceedings of the Korean Society of Broadcast Engineers Conference
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    • 2016.06a
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    • pp.369-372
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    • 2016
  • 본 논문에서는 고효율 비디오 부호화에서 채택하고 있는 인-루프 필터 중 SAO (sample adaptive offset)를 컨볼루션 신경망으로 대체하여 부호화 효율을 향상시키는 방법을 제안한다. SAO 는 양자화 에러를 줄이기 위해 인코더에서 디코더로 적절한 오프셋 값을 전송한다. 제안하는 컨볼루션 신경망을 사용한 인-루프 필터는 인코더와 디코더가 같은 컨볼루션 신경망을 사용하여, 추가적인 비트를 디코더로 전송할 필요 없이 양자화 에러를 줄일 수 있다. 컨볼루션 신경망의 구조는 두 가지를 각각 사용하였고, 각 컨볼루션 신경망의 구조에 대해서 입력 영상과 원래 영상의 평균제곱오차에 따라 다른 모델을 적용하였다. 따라서 제안하는 방법을 HEVC에 적용하여 기존의 방법보다 더 적은 bit 로 더 좋은 화질의 영상을 얻어서 BD-rate 의 gain 을 얻을 수 있을 뿐만 아니라, 주관적인 화질의 비교에서도 더 좋은 결과를 보인다.

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Design of an Observer for Position and Speed Sensorless Vector Control of PMSM (PMSM의 위치 및 속도 센서리스 벡터제어를 위한 관측기의 설계)

  • 정동화
    • Journal of the Korean Society of Safety
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    • v.13 no.1
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    • pp.54-63
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    • 1998
  • This paper proposes a theoretical analysis of a closed loop adaptive speed control system for control the inverter driven permanent magnet synchronous motor(PMSM). This control system utilizes a mechanically sensorless state observer for the generation of all controller feedback information. The observer processes measurements of stator frame voltage and current to produce estimates of rotor position and speed and rotor frame currents. It is shown that the identity observer, when properly formulated, has the same linearized error dynamics as the extended kalman filter(EKF). Consequently, it is shown that the gains within the identity observer can be designed in a manner identical to that of the EKF. In this way, the designability of the nonlinear observer is assured, as is the optimality of its performance for small errors. A sequence of simulation are performed and they demonstrate the successful performance.

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Improved Symbol Timing Recovery using the jitter slope-rate of adaptive loop filter in ATSC DTV systems (적응적 루프필터의 지터 변화율을 이용한 ATSC DTV 시스템의 심볼 타이밍 동기)

  • Nam, Wan-Ju;Lee, Joo-Hyung;Kim, Jae-Moung;Kim, Seung-Won
    • Proceedings of the Korean Society of Broadcast Engineers Conference
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    • 2005.11a
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    • pp.109-112
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    • 2005
  • ATSC 지상파 DTV 시스템에서 심볼 타이밍 동기 성능 개선을 위한 알고리즘을 제안한다. 일반적으로 심볼 타이밍 동기를 위해 사용되는 가드너 방법은 다중 경로 페이딩 환경에서 성능이 좋지만 지터에 의해 성능 열화가 발생한다. 지터량는 루프 필터 대역폭이 작을수록 작아지지만, 수렴속도는 느려지게 된다. 수렴속도는 빠르면서 수렴 후 지터량를 감소시키기 위해 일정시간마다 루프필터의 출력 값을 평균하고 이 평균값을 이용하여 옵셋량을 추정한 후 추정된 옵셋의 변화율에 따라 루프 필터의 대역폭을 줄여 지터의 크기를 줄이는 알고리즘을 제안한다.

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Stochastic intelligent GA controller design for active TMD shear building

  • Chen, Z.Y.;Peng, Sheng-Hsiang;Wang, Ruei-Yuan;Meng, Yahui;Fu, Qiuli;Chen, Timothy
    • Structural Engineering and Mechanics
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    • v.81 no.1
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    • pp.51-57
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    • 2022
  • The problem of optimal stochastic GA control of the system with uncertain parameters and unsure noise covariates is studied. First, without knowing the explicit form of the dynamic system, the open-loop determinism problem with path optimization is solved. Next, Gaussian linear quadratic controllers (LQG) are designed for linear systems that depend on the nominal path. A robust genetic neural network (NN) fuzzy controller is synthesized, which consists of a Kalman filter and an optimal controller to assure the asymptotic stability of the discrete control system. A simulation is performed to prove the suitability and performance of the recommended algorithm. The results indicated that the recommended method is a feasible method to improve the performance of active tuned mass damper (ATMD) shear buildings under random earthquake disturbances.

Complexity-based Sample Adaptive Offset Parallelism (복잡도 기반 적응적 샘플 오프셋 병렬화)

  • Ryu, Eun-Kyung;Jo, Hyun-Ho;Seo, Jung-Han;Sim, Dong-Gyu;Kim, Doo-Hyun;Song, Joon-Ho
    • Journal of Broadcast Engineering
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    • v.17 no.3
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    • pp.503-518
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    • 2012
  • In this paper, we propose a complexity-based parallelization method of the sample adaptive offset (SAO) algorithm which is one of HEVC in-loop filters. The SAO algorithm can be regarded as region-based process and the regions are obtained and represented with a quad-tree scheme. A offset to minimize a reconstruction error is sent for each partitioned region. The SAO of the HEVC can be parallelized in data-level. However, because the sizes and complexities of the SAO regions are not regular, workload imbalance occurs with multi-core platform. In this paper, we propose a LCU-based SAO algorithm and a complexity prediction algorithm for each LCU. With the proposed complexity-based LCU processing, we found that the proposed algorithm is faster than the sequential implementation by a factor of 2.38 times. In addition, the proposed algorithm is faster than regular parallel implementation SAO by 21%.

A Low Phase Noise Phase Locked Loop with Current Compensating Scheme (전류보상 기법을 이용한 낮은 위상 잡음 위상고정루프)

  • Song, Youn-Gui;Choi, Young-Shig;Ryu, Ji-Goo
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.43 no.12 s.354
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    • pp.74-80
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    • 2006
  • This work presents a novel architecture of phase locked loop (PLL) with the current compensating scheme to improve phase noise performance. The proposed PLL has two Charge Pump (CP), main-CP (MCP) and sub-CP (SCP). The smaller SCP current with same time duration but opposite direction of UP/DN MCP current is injected to the loop filter (LF). It suppress the voltage fluctuation of LF. In result, it improves phase noise characteristic. The Proposed PLL has been fabricated with 0.35fm 3.3V CMOS process. Measured phase noise at 1-MHz offset is -103dBc/Hz resulting in a minimum 3dBc/Hz phase noise improvement compared to the conventional PLL.

Wideband Multi-bit Continuous-Time $\Sigma\Delta$ Modulator with Adaptive Quantization Level (적응성 양자화 레벨을 가지는 광대역 다중-비트 연속시간 $\Sigma\Delta$ 모듈레이터)

  • Lee, Hee-Bum;Shin, Woo-Yeol;Lee, Hyun-Joong;Kim, Suh-Wan
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.44 no.11
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    • pp.1-8
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    • 2007
  • A wideband continuous-time sigma delta modulator for wireless application is implemented in 130nm CMOS. The SNR for small input signal is improved using a proposed adaptive quantizer which can effectively scale the quantization level. The modulator comprises a second-order loop filter for low power consumption, 4-bit quantizer and DAC for low jitter sensitivity and high linearity. Designed circuit achieves peak SNR of 51.36B with 10MHz signal Bandwidth and 320MHz sampling frequency dissipating 30mW.

Complexity Reduction of HEVC SAO Intra Modes By Adjustment of Offset Values (HEVC SAO 인트라 모드 오프셋 값 조정을 통한 복잡도 감소)

  • Mun, Ji-Hun;Choi, Jung-Ah;Ho, Yo-Sung
    • Journal of Broadcast Engineering
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    • v.19 no.3
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    • pp.355-361
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    • 2014
  • In this paper, we propose a complexity reduction method of sample adaptive offset (SAO), which is an in-loop filter in high-efficiency video coding (HEVC). In the conventional SAO, an offset value is calculated for each coding tree block (CTB) to minimize the error between the original and reconstructed images. In order to determine the optimal offset value, all offset candidates are examined and the offset value that leads to the smallest rate-distortion cost is chosen. Thus, SAO occupies a significant amount of the computational complexity in the HEVC encoder. In the proposed method, we determine the least-used band (LUB) by considering the statistical characteristics of offset values and without processing the offset value included in the LUB. Also, in the offset value decision stage, we check only a certain number of candidates rather than all of them. Experimental results show that the proposed method reduces the encoding time by approximately 8.15% without yielding a significant loss in terms of coding efficiency.

Line Impedance Estimation Based Adaptive Droop Control Method for Parallel Inverters

  • Le, Phuong Minh;Pham, Xuan Hoa Thi;Nguyen, Huy Minh;Hoang, Duc Duy Vo;Nguyen, Tuyen Dinh;Vo, Dieu Ngoc
    • Journal of Power Electronics
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    • v.18 no.1
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    • pp.234-250
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    • 2018
  • This paper presents a new load sharing control for use between paralleled three-phase inverters in an islanded microgrid based on the online line impedance estimation by the use of a Kalman filter. In this study, the mismatch of power sharing when the line impedance changes due to temperature, frequency, significant differences in line parameters and the requirements of the Plug-and-Play mode for inverters connected to a microgrid has been solved. In addition, this paper also presents a new droop control method working with the line impedance that is different from the traditional droop algorithm when the line impedance is assumed to be pure resistance or pure inductance. In this paper, the line impedance estimation for parallel inverters uses the minimum square method combined with a Kalman filter. In addition, the secondary control loops are designed to restore the voltage amplitude and frequency of a microgrid by using a combined nominal value SOGI-PLL with a generalized integral block and phase lock loop to monitor the exact voltage magnitude and frequency phase at the PCC. A control model has been simulated in Matlab/Simulink with three voltage source inverters connected in parallel for different ratios of power sharing. The simulation results demonstrate the accuracy of the proposed control method.