• Title/Summary/Keyword: Window switching

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Low delay window switching modified discrete cosine transform for speech and audio coder (음성 및 오디오 부호화기를 위한 저지연 윈도우 스위칭 modified discrete cosine transform)

  • Kim, Young-Joon;Lee, In-Sung
    • The Journal of the Acoustical Society of Korea
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    • v.37 no.2
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    • pp.110-117
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    • 2018
  • In this paper, we propose a low delay window switching MDCT (Modified Discrete Cosine Transform) method for speech/audio coder. The window switching algorithm is used to reduce the degradation of sound quality in non-stationary trasient duration and to reduce the algorithm delay by using the low delay TDAC (Time Domain Aliasing Cancellation). While the conventional window switching algorithms uses overlap-add with different lengths, the proposed method uses the fixed overlap add length. It results the reduction of algorithm delay by half and 1 bit reduction in frame indication information by using 2 window types. We apply the proposed algorithm to G.729.1 based on MDCT in order to evaluate the performance. The propose method shows the reduction of algorithm delay by half while speech quality of the proposed method maintains same as the conventional method.

Performance analysis of changing initial TCP window size (Initial TCP window size의 변경에 따른 성능분석)

  • 김정훈;이계상;김창규
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 1998.11a
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    • pp.370-373
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    • 1998
  • 현재 인터넷상의 QoS(Quality of Service) 향상을 위해서 여러 가지 방법과 기술들이 소개되고 있다. 이러한 QoS 향상을 위해 트래픽 제어기법과 IS(Integrated Services), DS(Differentiated Services), Tag Switching, MPLS(Multi protocol Label Switching) 등과 같은 방법으로 인터넷에서 보다 나은 서비스를 지원하려는 노력이 시도되고 있다. 본 논문에서는 특히 TCP connection에서의 initial window size의 변경이 네트워크의 QoS, 즉 link의 utilization과 packet의 drop, performance에 어떠한 영향을 주는지를 살펴본다. 그리고, 이에 대한 특성을 분석하고 개선점을 현재의 인터넷에서 가장 많이 사용되어지고 있는 FTP와 web에 대한 모델을 사용하여 가상적으로 시뮬레이션을 해본다.

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Design and Analsis of a high speed switching system with two priority (두개의 우선 순위를 가지는 고속 스윗칭 시스템의 설계 및 성능 분석)

  • Hong, Yo-Hun;Choe, Jin-Sik;Jeon, Mun-Seok
    • The KIPS Transactions:PartC
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    • v.8C no.6
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    • pp.793-805
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    • 2001
  • In the recent priority system, high-priority packet will be served first and low-priority packet will be served when there isn\`t any high-priority packet in the system. By the way, even high-priority packet can be blocked by HOL (Head of Line) contention in the input queueing System. Therefore, the whole switching performance can be improved by serving low-priority packet even though high-priority packet is blocked. In this paper, we study the performance of preemptive priority in an input queueing switch for high speed switch system. The analysis of this switching system is taken into account of the influence of priority scheduling and the window scheme for head-of-line contention. We derive queue length distribution, delay and maximum throughput for the switching system based on these control schemes. Because of the service dependencies between inputs, an exact analysis of this switching system is intractable. Consequently, we provide an approximate analysis based on some independence assumption and the flow conservation rule. We use an equivalent queueing system to estimate the service capability seen by each input. In case of the preemptive priority policy without considering a window scheme, we extend the approximation technique used by Chen and Guerin [1] to obtain more accurate results. Moreover, we also propose newly a window scheme that is appropriate for the preemptive priority switching system in view of implementation and operation. It can improve the total system throughput and delay performance of low priority packets. We also analyze this window scheme using an equivalent queueing system and compare the performance results with that without the window scheme. Numerical results are compared with simulations.

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Ultra-fast Adaptive Frequency-controlled Hysteretic Buck Converter for Portable Devices

  • Kim, Kwang-Ho;Kong, Bai-Sun
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.16 no.5
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    • pp.615-623
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    • 2016
  • The paper describes a hysteretic buck converter including a differentiator and an adaptive hysteresis window controller. Differentiating the feedback signal achieves ultra-fast switching of the buck converter. The adaptive hysteresis window control allows a monotonous operation with predictable noise spectrum, and gives way to efficient design for variable supply and output voltages. The measurement results in a $0.13-{\mu}m$ CMOS process indicated that the switching frequency became double times higher, and the voltage ripple was reduced by up to 69%. They also indicated that the normalized switching frequency variation was reduced by 74% with variable $V_{DD}$ and by 63% with variable $V_{OUT}$. The power efficiency was improved by 3.5% depending on loading condition.

WOI : Determining Area of Interest and Gaze Analysis for Task Switching in a Window Unit Behavior Measurement in Windowing System GUI (WOI : 윈도윙 시스템 GUI에서의 창 단위 작업 전환 행위 측정을 위한 관심영역 지정 및 시선 분석)

  • Ko, Eunji;Choi, Sun-Young
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.20 no.5
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    • pp.963-971
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    • 2016
  • This paper is a research of gaze analysis for measuring task switching behavior at multiple windows in GUI of windowing system. Previous methods that define area of interest for categorizing gaze had difficulties to define dynamic content that disappears or changes over time. On the other hand, this study suggests a new method to categorize gaze that defines Area of interest in a unit of window during the eye tracking experiment. In this paper, we constructed the conception of WOI(Window of Interest) in GUI of windowing system. Therefore, we developed a system using an eye tracker device and implemented a number of experiments. In addition, we analyzed the number of task switching and proportion of watched content. The method in the study comprehend from previous researches as it can measure and analyze the multi-tasking behaviors using multiple numbers of windows.

Variable Sampling Window Flip-Flops for High-Speed Low-Power VLSI (고속 저전력 VLSI를 위한 가변 샘플링 윈도우 플립-플롭의 설계)

  • Shin Sang-Dae;Kong Bai-Sun
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.42 no.8 s.338
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    • pp.35-42
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    • 2005
  • This paper describes novel flip-flops with improved robustness and reduced power consumption. Variable sampling window flip-flop (VSWFF) adjusts the width of the sampling window according to input data, providing robust data latching as well as shorter hold time. The flip-flop also reduces power consumption for higher input switching activities as compared to the conventional low-power flip-flop. Clock swing-reduced variable sampling window flip-flop (CSR-VSWFF) reduces clock power consumption by allowing the use of a small swing clock. Unlike conventional reduced clock swing flip-flops, it requires no additional voltage higher than the supply voltage, eliminating design overhead related to the generation and distribution of this voltage. Simulation results indicate that the proposed flip-flops provide uniform latency for narrower sampling window and improved power-delay product as compared to conventional flip-flops. To evaluate the performance of the proposed flip-flops, test structures were designed and implemented in a $0.3\mu m$ CMOS process technology. Experimental result indicates that VSWFF yields power reduction for the maximum input switching activity, and a synchronous counter designed with CSR-VSWFF improves performance in terms of power consumption with no use of extra voltage higher than the supply voltage.

A Study on the Dynamic Window Switching MDCT for Enhanced AC-3 Audio Filterbank (다이나믹 윈도우 스위칭기법을 적용한 AC-3 오디오 필터뱅크의 성능향상에 관한 연구)

  • 김준성
    • Proceedings of the Acoustical Society of Korea Conference
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    • 1998.06e
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    • pp.23-26
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    • 1998
  • This paper presents a technique to enhance TDAC in the AC-3 algorithm. To reduce block boundary noise without decreasing the performance of transform coding, new special window adopted. They improves the defect of the AC-3 algorithm that could not properly cancel aliasing in the tansient period. In addition, a fast MDCT calculation algorithm based on a fast Fourier Transform, is adopted.

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An Inductive-coupling Link with a Complementary Switching Transmitter and an Integrating Receiver

  • Jeong, Youngkyun;Kim, Hyun-Ki;Kim, Sang-Hoon;Kwon, Kee-Won;Chun, Jung-Hoon
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.14 no.2
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    • pp.227-234
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    • 2014
  • A transceiver for a high-speed inductive-coupling link is proposed. The bi-phase modulation (BPM) signaling scheme is used due to its good noise immunity. The transmitter utilizes a complementary switching method to remove glitches in transmitted data. To increase the timing margin on the receiver side, an integrating receiver with a pre-charging equalizer is employed. The proposed transceiver was implemented via a 130-nm CMOS process. The measured timing window for a $10^{-12}$ bit error rate (BER) at 1.8 Gb/s was 0.33 UI.

A Materials Approach to Resistive Switching Memory Oxides

  • Hasan, M.;Dong, R.;Lee, D.S.;Seong, D.J.;Choi, H.J.;Pyun, M.B.;Hwang, H.
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.8 no.1
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    • pp.66-79
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    • 2008
  • Several oxides have recently been reported to have resistance-switching characteristics for nonvolatile memory (NVM) applications. Both binary and ternary oxides demonstrated great potential as resistive-switching memory elements. However, the switching mechanisms have not yet been clearly understood, and the uniformity and reproducibility of devices have not been sufficient for gigabit-NVM applications. The primary requirements for oxides in memory applications are scalability, fast switching speed, good memory retention, a reasonable resistive window, and constant working voltage. In this paper, we discuss several materials that are resistive-switching elements and also focus on their switching mechanisms. We evaluated non-stoichiometric polycrystalline oxides ($Nb_2O_5$, and $ZrO_x$) and subsequently the resistive switching of $Cu_xO$ and heavily Cu-doped $MoO_x$ film for their compatibility with modem transistor-process cycles. Single-crystalline Nb-doped $SrTiO_3$ (NbSTO) was also investigated, and we found a Pt/single-crystal NbSTO Schottky junction had excellent memory characteristics. Epitaxial NbSTO film was grown on an Si substrate using conducting TiN as a buffer layer to introduce single-crystal NbSTO into the CMOS process and preserve its excellent electrical characteristics.

Switching Behaviour of the Ferroelectric Thin Film and Device Characteristics of MFSFET with Fatigue (피로현상을 고려한 강유전박막의 Switching 과 MFSFET 소자의 특성)

  • Lee, Kook-Pyo;Kang, Seong-Jun;Yoon, Yung-Sup
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.37 no.6
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    • pp.24-33
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    • 2000
  • Switching behaviour of the ferroelectric thin film and device characteristics of the MFSFET(Metal-Ferroelectric-Semiconductor FET) are simulated with taking into account the accumulation of oxygen vacancies near interface between the ferroelectric thin film and the bottom electrode caused by the progress of fatigue. In our switching model, relative switched charge is 0.74 nC before fatigue, but after the progress of fatigue it reduces to 0.15 nC with the generation of oxygen vacancies. It indicates that the generation of oxygen vacancies strongly suppresses polarization reversal. $C-V_G\;and\;I_D-V_G$ curves in our MFSFET device model exhibit the memory window of 2 V and show the accumulation, the depletion and the inversion regions in capacitance characteristic clearly. The difference of saturation drain current of the device before fatigue in shown by the dual threshold voltages in $I_D-V_G$ curve as 6nA/$cm^2$ and decreases as much as 50% after fatigue. Decrease of the difference of saturation drain currents by fatigue implies that the accumulation of oxygen vacancies with the fatigue should be avoided in the device application. Our simulation model is expected to play an important role in estimation of the behavior of MFSFET device with various ferroelectric thin films.

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