• Title/Summary/Keyword: Wide output voltage operation

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CMOS Image Sensor with Dual-Sensitivity Photodiodes and Switching Circuitfor Wide Dynamic Range Operation

  • Lee, Jimin;Choi, Byoung-Soo;Bae, Myunghan;Kim, Sang-Hwan;Oh, Chang-Woo;Shin, Jang-Kyoo
    • Journal of Sensor Science and Technology
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    • v.26 no.4
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    • pp.223-227
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    • 2017
  • Conventional CMOS image sensors (CISs) have a trade-off relationship between dynamic range and sensitivity. In addition, their sensitivity is determined by the photodiode capacitance. In this paper, CISs that consist of dual-sensitivity photodiodes in a unit pixel are proposed for achieving wide dynamic ranges. In the proposed CIS, signal charges are generated in the dual photodiodes during integration, and these generated signal charges are accumulated in the floating-diffusion node. The signal charges generated in the high-sensitivity photodiodes are transferred to the input of the comparator through an additional source follower, and the signal voltages converted by the source follower are compared with a reference voltage in the comparator. The output voltage of the comparator determines which photodiode is selected. Therefore, the proposed CIS composed of dual-sensitivity photodiodes extends the dynamic range according to the intensity of light. A $94{\times}150$ pixel array image sensor was designed using a conventional $0.18{\mu}m$ CMOS process and its performance was simulated.

Current Mode Integrated Control Technique for Z-Source Inverter Fed Induction Motor Drives

  • Thangaprakash, Sengodan;Krishnan, Ammasai
    • Journal of Power Electronics
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    • v.10 no.3
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    • pp.285-292
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    • 2010
  • This paper presents a current mode integrated control technique (CM-ICT) using a modified voltage space vector modulation (MSVM) for Z-source inverter (ZSI) fed induction motor drives. MSVM provides a better DC voltage boost in the dc-link, a wide range of AC output voltage controllability and a better line harmonic profile. In a voltage mode ICT (VM-ICT), the outer voltage feedback loop alone is designed and it enforces the desired line voltage to the motor drive. An integrated control technique (ICT), with an inner current feedback loop is proposed in this paper for the purpose of line current limiting and soft operation of the drive. The current command generated by the PI controller and limiter in the outer voltage feedback loop, is compared with the actual line current, and the error is processed through the PI controller and a limiter. This limiter ensures that, the voltage control signal to the Z-source inverter is constrained to a safe level. The rise and fall of the control signal voltage are made to be gradual, so as to protect the induction motor drive and the Z-source inverter from transients. The single stage controller arrangement of the proposed CM-ICT offers easier compensation. Analysis, Matlab/Simulink simulations, and experimental results have been presented to validate the proposed technique.

Design and simulation of an RCN Controller to improve steady state behavior of a self-excited induction generator

  • Garg, Anjali;Sandhu, Kanwarjit Singh;Saini, Lalit Mohan
    • Journal of international Conference on Electrical Machines and Systems
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    • v.1 no.4
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    • pp.464-471
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    • 2012
  • Self-excited induction generators (SEIG) are gaining importance as compared to conventional generators due to their capability toconvert wind energy into electrical energy for a wide range of variation in operating speed. The performance of such a generator depends upon the load, rotor speed and excitation capacitance. Therefore, depending upon the operating conditions, the output voltage and frequency of this machine goes on changing and this imposes a restriction on its usage. In order to maintain constant voltage and frequency, it need controllers, which make the circuit complicated and also increases the overall cost of power generation. This paper presents a simple controller to regulate the output voltage and frequency of SEIG for variation in its operating conditions due to any change in load, rotor speed and excitation capacitance (R, N, C) and their combination. The controller presented is simple in design, user friendly and is also less expensive, as the elements used in the controller are only resistors, inductors and capacitors. A block of SEIG for steady state operation is also modeled and presented in this paper. SEIG, Controller and other components are modeled and simulated using Matlab/Simulink.

Bi-Directional Interleaved Current-Fed Resonant Converter with Reduced Sized of Output Filter for FCEV (출력 필터의 크기를 줄인 연료전지 자동차용 양방향 인터리브드 전류원 공진형 컨버터)

  • Moon, Dong-Ok;Park, Jun-Sung;Choi, Se-Wan
    • The Transactions of the Korean Institute of Power Electronics
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    • v.19 no.6
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    • pp.503-510
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    • 2014
  • This study proposes a bi-directional interleaved current-fed resonant converter (CRC) with reduced size of the output filter for a fuel cell electric vehicle. The proposed CRC achieves zero-current switching turn on and off of switches and diodes and makes ripple current of the output capacitor theoretically zero. As a result, the cost and volume of the output capacitor are significantly reduced. The two-stage power conversion technique is also applied for wide input and output voltage range operations. A 2kW prototype of the proposed converter is built and tested to verify the validity of the proposed operation.

Simple High Efficiency Full-Bridge DC-DC Converter using a Series Resonant Capacitor

  • Jeong, Gang-Youl;Kwon, Su-Han;Park, Geun-Yong
    • Journal of Electrical Engineering and Technology
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    • v.11 no.1
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    • pp.100-108
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    • 2016
  • This paper presents a simple high efficiency full-bridge DC-DC converter using a series resonant capacitor. The proposed converter achieves the zero voltage switching of the primary switches under a wide range of load conditions and reduces the high circulating current in the freewheeling mode using the leakage resonant inductance and the series resonant capacitor. Thus, the proposed converter overcomes the drawbacks of the conventional full-bridge DC-DC converter and improves its overall system efficiency. Its structure is simplified by using the leakage inductance of the transformer as the resonant inductance and omitting the DC output filter inductance. Also it can operate over a wide range of input voltages. In this paper, the operational principle, analysis and design example are described in detail. Finally, the experimental results from a 650W (24V/27A) prototype are demonstrated to confirm the operation, validity and features of the proposed converter.

A Study on the High Performance Driving of Variable Speed Control for Induction Motor used Microprocessor (마이크로 프로세서에 의한 가변속 유도 전동기의 고효율 운전에 관한 연구)

  • Yoon, Byong-Do;Choi, Sung-Jun;Kim, Eel-Hwan
    • Proceedings of the KIEE Conference
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    • 1989.07a
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    • pp.576-578
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    • 1989
  • This paper describes a new pwm scheme of variable speed control for induction motor. The proposed scheme have the programmed pwm switching pattern which have the doninant harmonic elimination over the wide range of output speed in induction motor. Experimental results of proposed scheme hare high quality output current, voltage and torque than that of conventional pwm scheme. Therefore proposed scheme have the smooth operation and suitable for variable speed control in induction motor.

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A Wide Input Range, 95.4% Power Efficiency DC-DC Buck Converter with a Phase-Locked Loop in 0.18 ㎛ BCD

  • Kim, Hongjin;Park, Young-Jun;Park, Ju-Hyun;Ryu, Ho-Cheol;Pu, Young-Gun;Lee, Minjae;Hwang, Keumcheol;Yang, Younggoo;Lee, Kang-Yoon
    • Journal of Power Electronics
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    • v.16 no.6
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    • pp.2024-2034
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    • 2016
  • This paper presents a DC-DC buck converter with a Phase-Locked Loop (PLL) that can compensates for power efficiency degradation over a wide input range. Its switching frequency is kept at 2 MHz and the delay difference between the High side driver and the Low side driver can be minimized with respect to Process, Voltage and Temperature (PVT) variations by adopting the PLL. The operation mode of the proposed DC-DC buck converter is automatically changed to Pulse Width Modulation (PWM) or PWM frequency modes according to the load condition (heavy load or light load) while supporting a maximum load current of up to 1.2 A. The PWM frequency mode is used to extend the CCM region under the light load condition for the PWM operation. As a result, high efficiency can be achieved under the light load condition by the PWM frequency mode and the delay compensation with the PLL. The proposed DC-DC buck converter is fabricated with a $0.18{\mu}m$ BCD process, and the die area is $3.96mm^2$. It is implemented to have over a 90 % efficiency at an output voltage of 5 V when the input range is between 8 V and 20 V. As a result, the variation in the power efficiency is less than 1 % and the maximum efficiency of the proposed DC-DC buck converter with the PLL is 95.4 %.

Design considerations for LCL type series resonant converter with phase shift control (위상제어 LCL형 직렬공진 콘버터의 설계에 관한 연구)

  • 민경진;유상봉;현동석
    • The Transactions of the Korean Institute of Electrical Engineers
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    • v.45 no.4
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    • pp.517-525
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    • 1996
  • A Simple AC complex circuit analysis for LCL type series resonant converter with phase shift control is proposed. Based on these analyses, a set of characteristic curves which allows a optimal design procedure for this converter is shown, without increasing the volt-ampere rating of tank circuit Especially, inverter output peak current can be minimized in both full load and partial load conditions. The presented design considerations can make the load range wide from full loads to light loads achieving turn-on with zero voltage switching (ZVS) operation. The detailed analysis and experimental results show the effectiveness of the proposed design algorithms. (author). refs., figs., tab.

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A Study on the Design of Voltage Clamp VCO Using Quadrature Phase (4분법을 이용한 전압 클램프 VCO의 설계에 관한 연구)

  • Seo, I.W.;Choi, W.B.;Joung, S.M.;Sung, M.Y.
    • Proceedings of the KIEE Conference
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    • 1999.07g
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    • pp.3184-3186
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    • 1999
  • In this paper, a new structure of fully differential delay cell VCO using quadrature phase for low phase noise and high speed operation is suggested. It is realized by inserting voltage clamp circuit into input pairs of delay cells that include three-control current source having high output impedance. In this reason. this newly designed delay cell for VCO has the low power supply sensitivity so that the phase noise can be reduced. The whole characteristics of VCO were simulated by using HSPICE and SABER. Simulation results show that the phase noise of new VCO is quite small compared with conventional fully differential delay cell VCO and ring oscillator type VCO. It is also very beneficial to low power supply design because of wide tuning range.

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A New Pulse Frequency Modulation(PFM) Series Boost Capacitor(SBC) Full Bridge DC/DC Converter (새로운 주파수 가변형(PFM) 직렬 부스트 캐패시터(SBC) 풀 브리지 DC/DC 컨버터)

  • Shin, Yong-Saeng;Jang, Young-Su;Roh, Chung-Wook;Hong, Sung-Soo;Lee, Hyo-Bum;Han, Sang-Kyoo
    • The Transactions of the Korean Institute of Power Electronics
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    • v.14 no.2
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    • pp.120-127
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    • 2009
  • This paper proposes a new Pulse Frequency Modulation(PFM)-Series Boost Capacitor(SBC) full bridge DC/DC Converter which features a high efficiency and high power density. The proposed converter controls the output voltage by varying the voltage across the series boost capacitor according to switching frequency and has no freewheeling period due to 50% fixed duty operation. As a result, its conduction loss is lower than that of the conventional phase shift full bridge converter. Moreover, ZVS of all power switches can be ensured along wide load ranges and output current ripple is very small. Therefore, it has very desirable merits such as a small output inductor, high efficiency, and improved heat generation. This paper performs a rationale and PSIM simulation of the proposed converter. Finally, experimental results from a 1.2kW(12V, 100A) prototype are presented to confirm the operation, validity and features of the proposed converter.