• Proceedings of the KIPE Conference
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• 2016.07a
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• pp.139-140
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• 2016

이 논문에서는, 홀드-업 보상 기법을 통해 넓은 입력 범위에서 최적 설계가 가능한 비대칭 하프-브리지 컨버터를 제안한다. 제안된 회로가 갖는 주된 장점은 기존의 회로 동작에 어떠한 변화도 주지 않은 채, 넓은 입력 전압 범위에서도 최적 설계가 가능하게 하는 것이다. 기존의 비대칭 하프-브리지 컨버터는 입력 전압이 가장 낮은 홀드-업 시 설계가 되어, 정상 동작 시 비대칭 동작에 의한 단점을 갖는 반면, 제안 된 컨버터는 홀드-업 시 추가적인 전압 이득을 통해 출력 전압을 제어하기 때문에 홀드-업 동작 시 넓은 입력 전압 범위에 관계없이 컨버터의 최적 설계가 가능하다. 또한 기존의 방법들에 비해, 정상 동작 시에 추가 소자에 의한 손실이 발생하지 않아, 전 범위에서 고효율을 달성하였다. 250-410V 입력, 45V/3.3A 출력의 컨버터를 통해 제안 된 회로의 동작을 검증하였다.

• Journal of the Korean Society for Precision Engineering
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• v.29 no.10
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• pp.1096-1100
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• 2012

In the phase-shift measurement method, the distance light travels can be obtained based on the phase difference between the reference signal and the measured signal. When the object having various colors is measured, the intensity of the measured signal much varies even at the same distance, and it causes different phase delay due to wide dynamic range input to a signal processing circuit. In this work, an measured intensity control method is proposed to solve this phase delay problem.

• Proceedings of the KIPE Conference
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• 2008.06a
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• pp.382-384
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• 2008

Hold-up time is a special requirement for the front end DC/DC converter in a server power supply. It forces the converter with the variable switching frequency to operate in a wide switching frequency range, which makes the regulation difficult and reduces the power density. In this paper a novel frequency controlled half bridge converter with the hold-up time extension circuit is proposed. During the hold-up time, the auxiliary switches are turned on, thus the resonant inductance is reduced and the voltage conversion ratio is increased. Therefore, the output capacitor of the power factor correction (PFC) circuit can be decreased, and the converter can have high power density. The proposed converter is verified by experimental results from a prototype with 700W, 400V input, and 12V output.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.10 s.352
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• pp.61-67
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• 2006

We developed a constant current source which is insensitive to threshold voltage variation caused by irregular grain boundary distribution in polycrystalline silicon. The proposed current source has superior saturation characteristics over wide range of input voltages as well as small current error compared to the previously reported Vth compensated sources. We measured the circuit performance and error in current due to parameter variation by using HSPICE.

• JSTS:Journal of Semiconductor Technology and Science
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• v.13 no.5
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• pp.459-464
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• 2013

A reset-free anti-harmonic programmable multiplying delay-locked loop (MDLL) that provides flexible integer clock multiplication for high performance clocking applications is presented. The proposed MDLL removes harmonic locking problems by utilizing a simple harmonic lock detector and control logic, which allows this MDLL to change the input clock frequency and multiplication factor during operation without the use of start-up circuitry and external reset. A programmable voltage controlled delay line (VCDL) is utilized to achieve a wide operating frequency range from 80 MHz to 1.2 GHz with a multiplication factor of 4, 5, 8, 10, 16 and 20. This MDLL achieves a measured peak-to-peak jitter of 20 ps at 1.2 GHz.

• Proceedings of the IEEK Conference
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• 2000.11c
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• pp.153-156
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• 2000

A novel silicon retina chip based on the information processing in the vertebrate retina was designed. The chip has a novel wiring structure in which all pixels are connected through the channel of MOS transistors, which simplifies a wiring structure compared with conventional resistive networks. The proposed structure minimizes the pixel area and certainly increases a fill factor since each pixel consists of only two photodiodes and three MOS transistors. It also enables the chip to operate over a wide range of light intensity by adjusting its conductance with the gate voltage. Simulation results with SPICE showed that the chip could extract the edge of input images successfully.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.35C no.5
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• pp.33-40
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• 1998

In this paper, a design of current-mode continuous-time filters for low voltage and low frequency applications using complementary bipolar current mirrors is presented. The proposed current-mode filters consist of simple bipolar current mirrors and capacitors and are quite suitable for monolithic integration. Since the design method of the proposed current-mode filters are based on the integrator type of realization, it can be used for a wide range of applications. Since the input impedance of simple bipolar current mirror is small, in this paper, negative feedback amplifier is used to realize is designed by cascade method. The cutoff frequency of the designed filter can be easily tunable by the DC controlling current from 60kHz to 120kHz. The characteristics of the designed current-mode filters are simulated and examined by SPICE using standard bipolar transistor parameters.

• Proceedings of the KIPE Conference
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• 2018.07a
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• pp.12-14
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• 2018

본 논문에서는, 넓은 입력전압 범위에서 높은 효율을 가지는 비대칭 하프-브릿지 컨버터를 제안한다. 비대칭 하프-브릿지 컨버터는 적은 소자수를 가지고, 영전압 스위칭이 가능한 특징으로 인해 작은 용량의 전원장치에서 널리 쓰이는 토폴로지이다. 하지만, 비대칭 하프-브릿지 컨버터는 넓은 입력전압 범위에서 설계되면 변압기에 큰 DC-오프셋 전류를 가지기 때문에, 변압기의 크기를 증가시키고 영전압 스위칭 에너지를 감소시키는 문제점을 갖는다. 따라서 이를 해결하기 위해, 제안하는 회로는 결합 인덕터를 사용한 새로운 구조의 정류기를 사용하여 변압기의 오프셋 전류를 제거한다. 이로 인해 제안하는 회로는 오프셋 전류로 인해 발생하는 문제점을 해결하여 넓은 입력전압 범위에서도 높은 효율을 가진다. 제안하는 회로의 효용성을 증명하기 위해 250-400V 입력전압과 100V/200W의 출력에서 실험이 진행되었다.

• Proceedings of the KIPE Conference
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• 2013.07a
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• pp.299-300
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• 2013

본 논문에서는 넓은 입력 및 출력전압 범위를 갖는 LLC DC-DC 컨버터 구성에 있어서 1 2 차 측 토폴로지별 입력 전압 및 부하 변동에 따른 주요 소자에 대한 이론적 해석 및 PSIM 시뮬레이션을 통해 손실을 예측 비교함으로써 500 [W]용 LLC 공진컨버터에 적합한 토폴로지 구성을 제안한다.

• The Transactions of the Korean Institute of Electrical Engineers D
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• v.52 no.5
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• pp.226-226
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• 2003

When an excessive voltage is applied to the discharge gap in ozone generator, the discharge room temperature becomes higher. As is well own, the efficiency of the ozone generation is deteriorated by the excessively hot temperature because of the decomposition reaction. In this paper, the simple small capacity ozone generating controller has been introduced, which provides effective and stable silent discharge characteristics over wide range input power. The proposed power controller has two important advantages, which imply that the production rate of ozone can be controlled linearly according to the delivered power and the surplus energy is recovered to the source. The experimental results are given to verify the performance of the pre proposed controller.