• 전력전자학회논문지
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• 제22권6호
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• pp.517-526
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• 2017

In this paper, we propose an LLC resonant converter that operates over a wide controllable output voltage ($50V_{DC}$ to $800V_{DC}$) and shows high efficiency characteristics under all load conditions and output voltages. Two 3.3kW prototypes are designed for an experimental comparison between the variable frequency control (control scheme 1) and the variable input voltage($V_{IN}$) control (control scheme 2) mechanisms. The experimental results show that the variable input control mechanism demonstrates high efficiency under all loads and output voltages.

• 전자공학회논문지C
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• 제35C권11호
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• pp.57-62
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• 1998

본 논문에서는 넓은 입력 전압 범위에 걸쳐 좋은 선형성을 보여주는 가변 트랜스컨덕터를 제안한다. 제안된 트랜스컨덕터는 선형 영역에서 동작하는 입력 MOS 트랜지스터를 사용하여 회로의 구성이 간단하고 좋은 가변성을 갖고 6.8V/sub p-p/의 넓은 입력범위를 갖는다. 또한 소오스-결합 차동쌍을 이용하여 실질적인 차동입력을 제공하고 정과 부의 트랜스컨덕턴스 값을 제공한다. 제안된 회로는 1.2㎛ single poly double metal n-well CMOS 공정을 사용하여 제작되었다. 제안된 회로의 THD 특성은 V/sub DD/=-V/sub ss/=5V, I/sub B/=20, 40μA이고 입력 신호 주파수가 1KHz일 때 6V/sub p-p/의 차동 입력전압에 대해 1% 미만임을 보여준다.

• Journal of Power Electronics
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• 제15권4호
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• pp.861-875
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• 2015

This paper presents a wide frequency range LLC resonant controller IC for LED backlight units. In this paper a new phase-domain resonance deviation prevention circuit (RDPC), which covers a wide frequency and input voltage range, is proposed. In addition, a wide range gate clock generator and an automatic dead time generator are proposed. The chip is fabricated using 0.35 μm BCD technology. The die size is 2 x 2 mm2. The frequency of the clock generator ranges from 38 kHz to 400 kHz, and the dead time ranges from 300 ns to 2 μs. The current consumption of the LLC resonant controller IC is 4 mA for a 100 kHz operation frequency using a supply voltage of 15 V.

• JSTS:Journal of Semiconductor Technology and Science
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• 제4권4호
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• pp.280-285
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• 2004

In this paper, a 9-bit analog-to-digital converter (ADC) is designed for optical disk drive (ODD) servo applications. In the ADC, the circuit technique to increase the operating range of the sample-and-hold amplifier is proposed, which can process the wide-varying input common-mode range. The algorithmic ADC structure is chosen so that the area can be significantly reduced, which is suitable for SoC integration. The ADC is fabricated in a 0.18-$\mu\textrm{m} $ CMOS 1P5M technology. Measurement results of the ADC show that SNDR is 51.5dB for the sampling rate of 6.5MS/s. The power dissipation is 36.3mW for a single supply voltage of 3.3V.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2008년도 하계학술대회 논문집
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• pp.64-65
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• 2008

The topology of active clamp forward converter provides ZVS characteristic and also the stress of voltage and current is smaller than that of the conventional forward converters. The benefits of this technique include a higher efficiency at a high switching frequency, lower EMI/RFI. In this paper, the active clamp forward converter is designed for operation in wide range voltage and has 19.5V/120W ratings with efficiency more than 90%.

• 전자공학회논문지A
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• 제28A권1호
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• pp.40-45
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• 1991

It is well known that the conventional differential source-coupled pair uses gates as its input terminals. This input pair provids a high open-loop gain, a large CMRR, and a good PSRR. For these reasons, the input pair has been used widely as an input stages of the differential amplifiers, but a narrow linear input range of this structurelimits its application in the area of some analog circuit design. A novel CMOS source-coupled backgate pair is proposed in this paper. The bulk of MOSFET is exploited and input devices are biased to operate in ohmic region. With this topology, the backgate pair of the wide linear input range and variable transconductance can be obtained. This backgate input differential stage is realized with the size of W/L=50/25 MOSFETs. The results show the nonlinear error is less than $\gamma$1% over 10V full-scale range for the bias current of 200$\mu$A with 10V single power-supply.

• 전력전자학회논문지
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• 제23권6호
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• pp.424-432
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• 2018

This study presents a single-phase single-stage three-level AC/DC converter with a wide controllable output voltage. The proposed AC/DC converter is designed to extend the application of e-mobility, such as electric vehicles. The single-stage converter integrates a PFC converter and a three-level DC/DC converter, operates at a fixed frequency, and provides a wide controllable output voltage (approximately 200-430Vdc) with high efficiencies over a wide load range. In addition, the input boost inductors operate in a discontinuous mode to improve the input power factor. The switching devices operate with ZVS, and the converter's THD is small, especially at full load. The feasibility of the proposed converter is verified by the experimental results of a 1.5 kW prototype.

• Journal of Power Electronics
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• 제9권5호
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• pp.736-747
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• 2009

A new type of single-phase Z-source AC/AC converter based on a single-phase matrix converter is proposed in this paper. The proposed single-phase Z-source AC/AC converter has unique features; namely that the output voltage can be bucked and in-phase/out-of-phase with the input voltage; that the output voltage can be boosted and in-phase/out-of-phase with the input voltage. The converter employs a safe-commutation strategy to conduct along a continuous current path, which results in the elimination of voltage spikes on switches without the need for a snubber circuit. The operating principles of the proposed single-phase Z-source AC/AC converter are described, and a circuit analysis is provided. To verify the performance of the proposed converter, a laboratory prototype based on a TMS320F2812 DSP was constructed. The simulation and the experimental results verified that the output voltage can be bucked-boosted and in-phase with the input voltage, and that the output voltage can be bucked-boosted and out-of-phase with the input voltage.

• Journal of Welding and Joining
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• 제13권2호
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• pp.139-149
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• 1995

Many pressure vessels for the power plants are fabricated from low alloy ferritic steels. The inner sides of the pressure vessels are commonly weld_cladded with austenitic stainless steels to minimize problems of corrosive attack. The submerged-arc welding(SAW) process is now used in preference to other processes because of the possibilities open to automation to reduce the overaII welding times. The most reliable way to avoid underclad cracks(UCC) which are often detected at the overlap of the clad beads is to use nonsusceptible steels such as SA508 class 3. At present domestically developed forging steel of SA508 cl.S is now being cladded with single layer by using 90mm wide strip, which transfers higher heat input into the base metal compared to the conventional two layers strip cladding which has been in wide use with 30-60 mm wide strip. But the current indices for the influence of heat input on crack susceptibility are not accurate enough to express the subtle difference in crack susceptibility of the steel. Therefore, the purpose of this present study is: l) To determine UCC susceptibility on domestic forging steel, SA508 cl.S cladded with single layer by using submerged arc 90mm strip and, 2) To optimize heat input range by which the crack susceptibility could be eliminated.

• 대한전자공학회논문지SD
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• 제45권3호
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• pp.54-59
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• 2008

본 논문에서는 광범위 출력전압을 위한 고정밀 BiCMOS cascode 전류미러를 제안하였다. 제안한 전류미러는 베이스 전류에러를 보상하는 BJT 전류미러를 기본으로 하고 있다. NMOS-NMOS cascode 구조 대신에 npn-NMOS cascode 구조를 사용하여, 출력저항과 출력전압 범위를 증가시켰다. npn 전류 복사 트랜지스터는 입력전류를 출력전류로 복사하고, NMOS 트랜지스터는 출력저항을 증가시켜 정밀한 전류 복사를 가능케 한다. 제안한 전류미러는 광범위 출력전압에서 정밀하게 전류를 복사한다. 5V/16V 0.5um BCD 공정을 이용하여 제작한 칩을 측정하여 검증하였고, $0.3V{\sim}16V$의 출력전압 범위에서 전류 에러는 $-2.5%{\sim}1.0%$이다.