• 제목/요약/키워드: Wide bandgap semiconductor

검색결과 49건 처리시간 0.028초

NH4OH 수용액 하에서 Cu 호일의 산화를 통해 합성한 CuO 나노벽의 가스센싱 특성 (Gas sensing properties of CuO nanowalls synthesized via oxidation of Cu foil in aqueous NH4OH)

  • 슈엔하이엔뷔엔;팜티엔헝;풍딘호앗;이시홍;이상욱;이준형;김정주;허영우
    • 한국표면공학회:학술대회논문집
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    • 한국표면공학회 2018년도 춘계학술대회 논문집
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    • pp.141-141
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    • 2018
  • Copper is one of the most abundant metals on earth. Its oxide (CuO) is an intrinsically p-type metal-oxide semiconductor with a bandgap ($E_g$) of 1.2-2.0 eV 1. Copper oxide nanomaterials are considered as promising materials for a wide range of applications e.g., lithium ion batteries, dye-sensitized solar cells, photocatalytic hydrogen production, photodetectors, and biogas sensors 2-7. Recently, high-density and uniform CuO nanostructures have been grown on Cu foils in alkaline solutions 3. In 2011, T. Soejima et al. proposed a facile process for the oxidation synthesis of CuO nanobelt arrays using $NH_3-H_2O_2$ aqueous solution 8. In 2017, G. Kaur et al. synthesized CuO nanostructures by treating Cu foils in $NH_4OH$ at room temperature for different treatment times 9. The surface treatment of Cu in alkaline aqueous solutions is a potential method for the mass fabrication of CuO nanostructures with high uniformity and density. It is interesting to compare the gas sensing properties among CuO nanomaterials synthesized by this approach and by others. Nevertheless, none of above studies investigated the gas sensing properties of as-synthesized CuO nanomaterials. In this study, CuO nanowalls versus nanoparticles were synthesized via the oxidation process of Cu foil in NH4OH solution at $50-70^{\circ}C$. The gas sensing properties of the as-prepared CuO nanoplates were examined with $C_2H_5OH$, $CH_3COCH_3$, and $NH_3$ at $200-360^{\circ}C$.

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Improvement in the bias stability of zinc oxide thin-film transistors using an $O_2$ plasma-treated silicon nitride insulator

  • 김웅선;문연건;권태석;박종완
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2009년도 제38회 동계학술대회 초록집
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    • pp.180-180
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    • 2010
  • Thin film transistors (TFTs) based on oxide semiconductors have emerged as a promising technology, particularly for active-matrix TFT-based backplanes. Currently, an amorphous oxide semiconductor, such as InGaZnO, has been adopted as the channel layer due to its higher electron mobility. However, accurate and repeatable control of this complex material in mass production is not easy. Therefore, simpler polycrystalline materials, such as ZnO and $SnO_2$, remain possible candidates as the channel layer. Inparticular, ZnO-based TFTs have attracted considerable attention, because of their superior properties that include wide bandgap (3.37eV), transparency, and high field effect mobility when compared with conventional amorphous silicon and polycrystalline silicon TFTs. There are some technical challenges to overcome to achieve manufacturability of ZnO-based TFTs. One of the problems, the stability of ZnO-based TFTs, is as yet unsolved since ZnO-based TFTs usually contain defects in the ZnO channel layer and deep level defects in the channel/dielectric interface that cause problems in device operation. The quality of the interface between the channel and dielectric plays a crucial role in transistor performance, and several insulators have been reported that reduce the number of defects in the channel and the interfacial charge trap defects. Additionally, ZnO TFTs using a high quality interface fabricated by a two step atomic layer deposition (ALD) process showed improvement in device performance In this study, we report the fabrication of high performance ZnO TFTs with a $Si_3N_4$ gate insulator treated using plasma. The interface treatment using electron cyclotron resonance (ECR) $O_2$ plasma improves the interface quality by lowering the interface trap density. This process can be easily adapted for industrial applications because the device structure and fabrication process in this paper are compatible with those of a-Si TFTs.

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깊은 준위 결함에 의한 SiC SBD 전기적 특성에 대한 영향 분석 (The effect of deep level defects in SiC on the electrical characteristics of Schottky barrier diode structures)

  • 이건희;변동욱;신명철;구상모
    • 전기전자학회논문지
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    • 제26권1호
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    • pp.50-55
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    • 2022
  • SiC는 차세대 전력반도체의 핵심 재료로 넓은 밴드갭과 높은 절연파괴강도, 열전도율을 가지고 있지만 deep level defect와 같은 다양한 문제를 야기하는 결함이 존재한다. SiC에서 나타나는 defect는 물성에서 나타나는 defect와 계면에서 나타나는 interface trap 2가지로 나뉜다. 본 논문은 상온 (300 K)에서 보고되는 Z1/2 trap concentration 0 ~ 9×1014 cm-3을 SiC substrate와 epi layer에 적용하여 turn-on 특성을 알아보고자 한다. 전류밀도와 SRH(Shockley-Read-Hall), Auger recombination을 통해 구조 내 재 결합률을 확인하였다. trap concentration이 증가할수록 turn-on시 전류밀도와 재 결합률은 감소하며 Ron은 0.004에서 0.022 mΩ으로 약 550% 증가하였다.

4H-SiC PiN 다이오드의 깊은 준위 결함에 따른 전기적 특성 분석 (Analysis of Electrical Characteristics due to Deep Level Defects in 4H-SiC PiN Diodes)

  • 이태희;박세림;김예진;박승현;김일룡;김민규;임병철;구상모
    • 한국재료학회지
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    • 제34권2호
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    • pp.111-115
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    • 2024
  • Silicon carbide (SiC) has emerged as a promising material for next-generation power semiconductor materials, due to its high thermal conductivity and high critical electric field (~3 MV/cm) with a wide bandgap of 3.3 eV. This permits SiC devices to operate at lower on-resistance and higher breakdown voltage. However, to improve device performance, advanced research is still needed to reduce point defects in the SiC epitaxial layer. This work investigated the electrical characteristics and defect properties using DLTS analysis. Four deep level defects generated by the implantation process and during epitaxial layer growth were detected. Trap parameters such as energy level, capture-cross section, trap density were obtained from an Arrhenius plot. To investigate the impact of defects on the device, a 2D TCAD simulation was conducted using the same device structure, and the extracted defect parameters were added to confirm electrical characteristics. The degradation of device performance such as an increase in on-resistance by adding trap parameters was confirmed.

RF 마그네트론 스퍼터링을 이용한 p 타입 투명전도 산화물 SrCu2O2 박막의 제조 (Fabrication of P-type Transparent Oxide Semiconductor SrCu2O2 Thin Films by RF Magnetron Sputtering)

  • 석혜원;김세기;이현석;임태영;황종희;최덕균
    • 한국재료학회지
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    • 제20권12호
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    • pp.676-680
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    • 2010
  • Most TCOs such as ITO, AZO(Al-doped ZnO), FTO(F-doped $SnO_2$) etc., which have been widely used in LCD, touch panel, solar cell, and organic LEDs etc. as transparent electrode material reveal n-type conductivity. But in order to realize transparent circuit, transparent p-n junction, and introduction of transparent p-type materials are prerequisite. Additional prerequisite condition is optical transparency in visible spectral region. Oxide based materials usually have a wide optical bandgap more than ~3.0 eV. In this study, single-phase transparent semiconductor of $SrCu_2O_2$, which shows p-type conductivity, have been synthesized by 2-step solid state reaction at $950^{\circ}C$ under $N_2$ atmosphere, and single-phase $SrCu_2O_2$ thin films of p-type TCOs have been deposited by RF magnetron sputtering on alkali-free glass substrate from single-phase target at $500^{\circ}C$, 1% $H_2$/(Ar + $H_2$) atmosphere. 3% $H_2$/(Ar + $H_2$) resulted in formation of second phases. Hall measurements confirmed the p-type nature of the fabricated $SrCu_2O_2$ thin films. The electrical conductivity, mobility of carrier and carrier density $5.27{\times}10^{-2}S/cm$, $2.2cm^2$/Vs, $1.53{\times}10^{17}/cm^3$ a room temperature, respectively. Transmittance and optical band-gap of the $SrCu_2O_2$ thin films revealed 62% at 550 nm and 3.28 eV. The electrical and optical properties of the obtained $SrCu_2O_2$ thin films deposited by RF magnetron sputtering were compared with those deposited by PLD and e-beam.

저온 공정 온도에서 $Al_2O_3$ 게이트 절연물질을 사용한 InGaZnO thin film transistors

  • 우창호;안철현;김영이;조형균
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2010년도 하계학술대회 논문집
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    • pp.11-11
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    • 2010
  • Thin-film-transistors (TFTs) that can be deposited at low temperature have recently attracted lots of applications such as sensors, solar cell and displays, because of the great flexible electronics and transparent. Transparent and flexible transistors are being required that high mobility and large-area uniformity at low temperature [1]. But, unfortunately most of TFT structures are used to be $SiO_2$ as gate dielectric layer. The $SiO_2$ has disadvantaged that it is required to high driving voltage to achieve the same operating efficiency compared with other high-k materials and its thickness is thicker than high-k materials [2]. To solve this problem, we find lots of high-k materials as $HfO_2$, $ZrO_2$, $SiN_x$, $TiO_2$, $Al_2O_3$. Among the High-k materials, $Al_2O_3$ is one of the outstanding materials due to its properties are high dielectric constant ( ~9 ), relatively low leakage current, wide bandgap ( 8.7 eV ) and good device stability. For the realization of flexible displays, all processes should be performed at very low temperatures, but low temperature $Al_2O_3$ grown by sputtering showed deteriorated electrical performance. Further decrease in growth temperature induces a high density of charge traps in the gate oxide/channel. This study investigated the effect of growth temperatures of ALD grown $Al_2O_3$ layers on the TFT device performance. The ALD deposition showed high conformal and defect-free dielectric layers at low temperature compared with other deposition equipments [2]. After ITO was wet-chemically etched with HCl : $HNO_3$ = 3:1, $Al_2O_3$ layer was deposited by ALD at various growth temperatures or lift-off process. Amorphous InGaZnO channel layers were deposited by rf magnetron sputtering at a working pressure of 3 mTorr and $O_2$/Ar (1/29 sccm). The electrodes were formed with electron-beam evaporated Ti (30 nm) and Au (70 nm) bilayer. The TFT devices were heat-treated in a furnace at $300^{\circ}C$ and nitrogen atmosphere for 1 hour by rapid thermal treatment. The electrical properties of the oxide TFTs were measured using semiconductor parameter analyzer (4145B), and LCR meter.

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투과전자현미경과 전자후방산란회절을 이용한 AlN의 미세구조 분석 (Microstructure analyses of aluminum nitride (AlN) using transmission electron microscopy (TEM) and electron back-scattered diffraction (EBSD))

  • 주영준;박청호;정주진;강승민;류길열;강성;김철진
    • 한국결정성장학회지
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    • 제25권4호
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    • pp.127-134
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    • 2015
  • AlN 단결정은 넓은 밴드갭(6.2 eV), 높은 열 전도도($285W/m{\cdot}K$), 높은 비저항(${\geq}10^{14}{\Omega}{\cdot}cm$), 그리고 높은 기계적 강도와 같은 장점들 때문에 차세대 반도체 적용을 위한 많은 흥미를 끈다. 벌크 AlN 단결정 또는 박막 템플릿(template)들은 주로 PVT(Physical vapor transport)법, 플럭스(flux)법, 용액 성장(solution growth)법, 그리고 증기 액상 증착(HVPE)법에 의해 성장된다. 단결정이 성장하는 동안에 발생하는 결함들 때문에 상업적으로 어려움을 갖게 된 이후로 결함들 분석을 통한 결정 품질 향상은 필수적이다. 격자결함 밀도(EPD)분석은 AlN 표면에 입자간 방위차와 결함이 존재하고 있는 것을 보여준다. 투과전자현미경(TEM)과 전자후방산란회절(EBSD)분석은 전체적인 결정 퀄리티와 다양한 결함의 종류들을 연구하는데 사용된다. 투과전자현미경(TEM)관찰로 AlN의 형태가 적층 결함, 전위, 이차상 등에 의해 크게 영향을 받는 것을 알 수 있었다. 또한 전자후방산란회절(EBSD)분석은 전위의 생성을 유도하는 성장 결함으로서 AlN의 zinc blende 폴리모프(polymorph)가 존재하고 있는 것을 나타내고 있었다.

Characterization of SiC nanowire synthesize by Thermal CVD

  • 정민욱;김민국;송우석;정대성;최원철;박종윤
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2009년도 제38회 동계학술대회 초록집
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    • pp.74-74
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    • 2010
  • One-dimensional nanosturctures such as nanowires and nanotube have been mainly proposed as important components of nano-electronic devices and are expected to play an integral part in design and construction of these devices. Silicon carbide(SiC) is one of a promising wide bandgap semiconductor that exhibits extraordinary properties, such as higher thermal conductivity, mechanical and chemical stability than silicon. Therefore, the synthesis of SiC-based nanowires(NWs) open a possibility for developing a potential application in nano-electronic devices which have to work under harsh environment. In this study, one-dimensional nanowires(NWs) of cubic phase silicon carbide($\beta$-SiC) were efficiently produced by thermal chemical vapor deposition(T-CVD) synthesis of mixtures containing Si powders and hydrocarbon in a alumina boat about $T\;=\;1400^{\circ}C$ SEM images are shown that the temperature below $1300^{\circ}C$ is not enough to synthesis the SiC NWs due to insufficient thermal energy for melting of Si Powder and decomposition of methane gas. However, the SiC NWs are produced over $1300^{\circ}C$ and the most efficient temperature for growth of SiC NWs is about $1400^{\circ}C$ with an average diameter range between 50 ~ 150 nm. Raman spectra revealed the crystal form of the synthesized SiC NWs is a cubic phase. Two distinct peaks at 795 and $970\;cm^{-1}$ over $1400^{\circ}C$ represent the TO and LO mode of the bulk $\beta$-SiC, respectively. In XRD spectra, this result was also verified with the strongest (111) peaks at $2{\theta}=35.7^{\circ}$, which is very close to (111) plane peak position of 3C-SiC over $1400 ^{\circ}C$ TEM images are represented to two typical $\beta$-SiC NWs structures. One is shown the defect-free $\beta$-SiC nanowire with a (111) interplane distance with 0.25 nm, and the other is the stacking-faulted $\beta$-SiC nanowire. Two SiC nanowires are covered with $SiO_2$ layer with a thickness of less 2 nm. Moreover, by changing the flow rate of methane gas, the 300 sccm is the optimal condition for synthesis of a large amount of $\beta$-SiC NWs.

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유기 금속 화학 증착법(MOCVD)의 희석된 SiH4을 활용한 Si-Doped β-Ga2O3 에피 성장 (Growth of Si-Doped β-Ga2O3 Epi-Layer by Metal Organic Chemical Vapor Deposition U sing Diluted SiH4)

  • 김형윤;김선재;천현우;이재형;전대우;박지현
    • 한국재료학회지
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    • 제33권12호
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    • pp.525-529
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    • 2023
  • β-Ga2O3 has become the focus of considerable attention as an ultra-wide bandgap semiconductor following the successful development of bulk single crystals using the melt growth method. Accordingly, homoepitaxy studies, where the interface between the substrate and the epilayer is not problematic, have become mainstream and many results have been published. However, because the cost of homo-substrates is high, research is still mainly at the laboratory level and has not yet been scaled up to commercialization. To overcome this problem, many researchers are trying to grow high quality Ga2O3 epilayers on hetero-substrates. We used diluted SiH4 gas to control the doping concentration during the heteroepitaxial growth of β-Ga2O3 on c-plane sapphire using metal organic chemical vapor deposition (MOCVD). Despite the high level of defect density inside the grown β-Ga2O3 epilayer due to the aggregation of random rotated domains, the carrier concentration could be controlled from 1 × 1019 to 1 × 1016 cm-3 by diluting the SiH4 gas concentration. This study indicates that β-Ga2O3 hetero-epitaxy has similar potential to homo-epitaxy and is expected to accelerate the commercialization of β-Ga2O3 applications with the advantage of low substrate cost.