• Title/Summary/Keyword: Wafer-to-Wafer

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Cost-effective and High-performance FBAR Duplexer Module with Wafer Level Packaging (웨이퍼 레벨 패키지를 적용한 저가격 고성능 FBAR 듀플렉서 모듈)

  • Bae, Hyun-Cheol;Kim, Sung-Chan
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.16 no.5
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    • pp.1029-1034
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    • 2012
  • This paper presents a cost-effective and high-performance film bulk acoustic resonator (FBAR) duplexer module for US-PCS handset applications. The FBAR device uses a glass wafer level packaging process, which is a more cost-effective alternative to the typical silicon capping process. The maximum insertion losses of the FBAR duplexer at the Tx and Rx bands are of 1.9 and 2.4 dB, respectively. The total thickness of the duplexer module is 1.2 mm, including the glass-wafer bonded Tx/Rx FBAR devices, PCB board, and transfer molding material.

Characterization of 6H-SiC Single Crystals grown by Sublimation Method

  • Kim, Hwa-Mok;Kang, Seung-Min;Kyung Joo;Auh, Keun-Ho
    • Proceedings of the Korea Association of Crystal Growth Conference
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    • 1997.06a
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    • pp.261-263
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    • 1997
  • 6H-SiC single crystals were successfully grown by the self-designed sublimation apparatus and the optimum growth condition was established. The grown SiC crystals were about 33mm in diameter and 10mm in length. Carrier concentration and doping type of undopped 6H-SiC wafer grown by sublimation method were 1016∼1017/㎤ and n-type Crystallinity of grown 6H-SiC wafer was better than of Acheson seed by data of Raman spectroscopy and Double Crystal XRD. We continue to characterize the grown 6H-SiC wafer in more detail and so we will grow the high-quality 6H-SiC single crystal wafer.

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The New Generation Laser Dicing Technology for Ultra Thin Si wafer

  • Kumagai, Masayoshi;Uchiyama, N.;Atsumi, K.;Fukumitsu, K.;Ohmura, E.;Morita, H.
    • Proceedings of the International Microelectronics And Packaging Society Conference
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    • 2006.10a
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    • pp.125-134
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    • 2006
  • Process & mechanism $\blacklozenge$ The process consists from two steps which are laser processing step and separation steop. $\blacklozenge$ The wavelength of laser beam is transmissible wavelength for the wafer. However, inside of Si wafer is processed due to temperature dependence of optical absorption coefficient Advantage & Application $\blacklozenge$ Advantages are high speed dicing, no debris contaminants, completely dry process, etc. $\blacklozenge$ The cutting edges were fine, The lifetime and endurances did not degrade the device characteristics $\blacklozenge$ A separation of a wafer with DAF was introduced as an application for SiP

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Effects of Oxide Layer Formed on TiN Coated Silicon Wafer on the Friction and Wear Characteristics in Sliding (미끄럼운동 시 TiN 코팅에 형성되는 산화막이 마찰 및 마멸 특성에 미치는 영향)

  • 조정우;이영제
    • Tribology and Lubricants
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    • v.18 no.4
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    • pp.260-266
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    • 2002
  • In this study, the effects of oxide layer farmed on the wear tracks of TiN coated silicon wafer on friction and wear characteristics were investigated. Silicon wafer was used for the substrate of coated disk specimens, which were prepared by depositing TiN coating with 1 ${\mu}{\textrm}{m}$ in coating thickness. AISI 52100 steel ball was used fur the counterpart. The tests were performed both in air for forming oxide layer on the wear track and in nitrogen to avoid oxidation. This paper reports characterization of the oxide layer effects on friction and wear characteristics using X-ray diffraction(XRD), Auger electron spectroscopy(AES), scanning electron microscopy (SEM) and multi-mode atomic force microscope(AFM).

Effects of oxide layer formed on TiN coated silicon wafer on the friction characteristics

  • Cho, C.W.;Lee, Y.Z.
    • Proceedings of the Korean Society of Tribologists and Lubrication Engineers Conference
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    • 2002.10b
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    • pp.167-168
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    • 2002
  • In this study, the effects of oxide layer formed on the wear tracks of TiN coated silicon wafer on friction characteristics were investigated. Silicon wafer was used for the substrate of coated disk specimens, which were prepared by depositing TiN coating with $1\;{\mu}m$ in coating thickness. AISI 52100 steel balls were used for the counterpart. The tests were performed both in air for forming oxide layer on the wear track and in nitrogen to avoid oxidation. This paper reports characterization of the oxide layer effects on friction characteristics using X-ray diffraction (XRD). scanning electron microscopy (SEM) and friction force microscope (FFM).

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Fabrication of Wafer-Scale Anodized Aluminum oxide(AAO)-Based capacitive biosensor

  • Kim, Bongjun;Oh, Jeseung;Yoo, Kyunghwa
    • Proceedings of the Korean Vacuum Society Conference
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    • 2016.02a
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    • pp.372.2-372.2
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    • 2016
  • Various nanobiosensors have been developed and extensively investigated. For their practical applications, however, the reproducibility and uniformity should be good enough and the mass-production should be possible. To fabricate anodized aluminium oxide (AAO)-based nanobiosesnor on wafer scale, we have designed and constructed a wafer-scale anodizing system. $1{\mu}m$-thick-aluminum is deposited on 4 inch SiO2/Si substrate and then anodized, resulting in uniform nanopores with an average pore diameter of about 65 nm. Furthermore, most AAO sensors constructed on this wafer provide capacitance values of 30 nF ~ 60 nF in PBS, demonstrating their uniformity.

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Fabrication of plastic CE (capillary electrophoresis) microchip by hot embossing process (핫 엠보싱 공정을 이용한 플라스틱 CE(capillary electrophoresis) 마이크로 칩의 제작)

  • Cha Nam-Goo;Park Chang-Hwa;Lim Hyun-Woo;Park Jin-Goo
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 2005.06a
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    • pp.1140-1144
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    • 2005
  • A plastic-based CE (capillary electrophoresis) microchip was fabricated by hot embossing process. A Si mold was made by wet etching process and a PMMA wafer was cut off from 1mm thick PMMA sheet. A micro-channel structure on PMMA substrate was produced by hot embossing process using the Si mold and the PMMA wafer. A vacuum assisted thermal bonding procedure was employed to seal an imprinted PMMA wafer and a blank PMMA wafer. The results of microscopic cross sectional images showed dimensions of channels were well preserved during thermal bonding process. In our procedure, the deformation amount of bonding process was below 1%. The entire fabrication process may be very useful for plastic based microchip systems.

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The Effect of Dual Wafer Back-Lapping Process on Flexural Strength of Semiconductor Chips (웨이퍼의 2단 이면공정이 반도체 칩의 휨 강도에 미치는 영향)

  • Lee Seong Min
    • Korean Journal of Materials Research
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    • v.15 no.3
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    • pp.183-188
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    • 2005
  • It was studied in this article how the flexural strength of bare silicon chips is influenced by adopting dual wafer back-lapping process. The experimental results showed that an additional finishing process after the conventional grinding process improves the flexural strength of bare chips by more than 2-fold. In particular, this work showed that the proper removal of the grinding marks$(Ra=0.1\;{\mu}m)$existing on the wafer back-surface resulting from the grinding process significantly contiributes to the enhancement of chip strength.

Zeta-potential in CMP process of sapphire wafer on poly-urethane pad (폴리우레탄 패드를 이용한 기계-화학 연마공정에서 파이어 웨이퍼 표면 전위)

  • Hwang, Sung-Won;Shin, Gwi-Su;Kim, Keun-Joo;Suh, Nam-Sup
    • Proceedings of the KSME Conference
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    • 2003.11a
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    • pp.1816-1821
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    • 2003
  • The sapphire wafer for blue light emitting device was manufactured by the implementation of the chemical and mechanical polishing process. The surface polishing of crystalline sapphire wafer was characterized by zeta potential measurement. The reduction process with the alkali slurry provides the surface chemical reaction with sapphire atoms. The poly-urethane pad also provides the frictional force to take out the chemically-reacted surface layers. The surface roughness was measured by the atomic force microscope and the crystalline quality was characterized by the double crystal X -ray diffraction analysis.

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Numerical Analysis of a Slurry Flow on a Rotating CMP Pad Using a Two-phase Flow Model

  • Nagayama, Katsuya;Sakai, Tommi;Kimura, Keiichi;Tanaka, Kazuhiro
    • International Journal of Precision Engineering and Manufacturing
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    • v.9 no.2
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    • pp.8-10
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    • 2008
  • Chemical mechanical polishing (CMP) is a very precise planarization technique where a wafer is polished by a slurry-coated pad. A slurry is dropped on the rotating pad surface and is supplied between the wafer and the pad. This research aims at reducing the slurry consumption and removing waste particles quickly from the wafer. To study the roles of grooves, slurry flows were simulated using the volume of fluid method (two-phase model for air and slurry) for pads with no grooves, and for pads with circular grooves.