• Title/Summary/Keyword: Wafer-to-Wafer

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Analysis of Aluminum Back Surface Field on Different Wafer Specification

  • Park, Seong-Eun;Bae, Su-Hyeon;Kim, Seong-Tak;Kim, Chan-Seok;Kim, Yeong-Do;Tak, Seong-Ju;Kim, Dong-Hwan
    • Proceedings of the Korean Vacuum Society Conference
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    • 2012.02a
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    • pp.216-216
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    • 2012
  • The purpose of this work is to investigate a back surface field (BSF) on variety wafer resistivity for industrial crystalline silicon solar cells. As pointed out in this manuscript, doping a crucible grown Cz Si ingot with Ga offers a sure way of eliminating the light induced degradation (LID) because the LID defect is composed of B and O complex. However, the low segregation coefficient of Ga in Si causes a much wider resistivity variation along the Ga doped Cz Si ingot. Because of the resistivity variation the Cz Si wafer from different locations has different performance as know. In the light of B doped wafer, we made wider resistivity in Si ingot; we investigated the how resistivities work on the solar cells performance as a BSF quality.

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GaN epitaxial growths on chemically and mechanically polished sapphire wafers grown by Bridgeman method (수평 Bridgeman법으로 성장된 사파이어기판 가공 및 GaN 박막성장)

  • 김근주;고재천
    • Journal of the Korean Crystal Growth and Crystal Technology
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    • v.10 no.5
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    • pp.350-355
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    • 2000
  • The fabrication of sapphire wafer in C plane has been developed by horizontal Bridgeman method and GaN based semiconductor epitaxial growth has been carried out in metal organic chemical vapour deposition. The single crystalline ingot of sapphire has been utilized for 2 inch sapphire wafers and wafer slicing and lapping machines were designed. These several steps of lapping processes provided the mirror-like surface of sapphire wafer. The measurements of the surface flatness and the roughness were carried out by the atomic force microscope. The GaN thin film growth on the developed wafer was confirmed the wafer quality and applicability to blue light emitting devices.

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Development of Inspection System With Optical Scanning Mechanism and Near-Infrared Camera Optics for Solar Cell Wafer (광학스캐닝 메커니즘 및 근적외선 카메라 광학계를 이용한 태양전지 웨이퍼 검사장치 개발)

  • Kim, Gyung Bum
    • Journal of the Semiconductor & Display Technology
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    • v.11 no.3
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    • pp.1-6
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    • 2012
  • In this paper, inspection system based on optical scanning mechanism is designed and developed for solar cell wafer. It consists of optical scanning mechanism, NIR camera optics, machinery and control system, algorithm of defect detection and software. Optical scanning mechanism is composed of geometrical camera optics and structured hybrid illumination system. It is used to inspection of surface defects. NIR camera optics is used for inspection of defects inside solar cell wafer. It is shown that surface and internal micro defects can be detected in developed inspection system for solar cell wafer.

Wafer Motion Modeling of Transfer Unit in Clean Tube System (클린 튜브 시스템 이송 유닛의 웨이퍼 운동 역학 모델링)

  • 신동헌;정규식;윤정용
    • Journal of the Korean Society for Precision Engineering
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    • v.21 no.3
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    • pp.66-73
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    • 2004
  • This paper presents wafer motion modeling of transfer unit in clean tube system, which was developed as a means for transferring the air-floated wafers inside the closed tube filled with the super clean airs. When the wafer is transferred in x direction with an initial velocity the motion along x direction can be modeled as a simple decaying motion due to viscous friction of the fluid. But, the motion in y direction is modeled as a mass-spring-damper system where the recovering force by air jets issued from the perforated is modeled as a linear spring. Experiments with a clean tube system built fur 12 wafer show the validity of the presented force and motion models.

Wafer 반송용 End-Effector의 설계 및 파지력 제어에 관한 연구

  • 권오진;최성주;이우영;이강원
    • Proceedings of the Korean Society Of Semiconductor Equipment Technology
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    • 2003.05a
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    • pp.80-87
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    • 2003
  • On this study, an End-Effector for the 300mm wafer transfer robot System is newly suggested. It is a mechanical type with $180^{\circ}$ rotating ranges and is composed of 3-point arms, two plate springs and single-axis DC motor. It is controlled by microchip for the DC motor control. To design, relationships on the gripping force and the wafer deformation is analyzed by FEM analysis. Criterion on gripping force of a suggested End-Effector is confirmed as $255 ~ 274g_f$ from experimental results. From experimented results on repeatable position accuracy, gripping force and gripping cycle times in a wafer cleaning system, we confirmed that the suggested End-Effector is well satisfied on the required performance for 300mm wafer transfer robot system.

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Development of Flexure Applied Bond head for Die to Wafer Hybrid Bonding (Die to Wafer Hybrid Bonding을 위한 Flexure 적용 Bond head 개발)

  • Jang, Woo Je;Jeong, Yong Jin;Lee, Hakjun
    • Journal of the Semiconductor & Display Technology
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    • v.20 no.4
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    • pp.171-176
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    • 2021
  • Die-to-wafer (D2W) hybrid bonding in the multilayer semiconductor manufacturing process is one of wafer direct bonding, and various studies are being conducted around the world. A noteworthy point in the current die-to-wafer process is that a lot of voids occur on the bonding surface of the die during bonding. In this study, as a suggested method for removing voids generated during the D2W hybrid bonding process, a flexible mechanism for implementing convex for die bonding to be applied to the bond head is proposed. In addition, modeling of flexible mechanisms, analysis/design/control/evaluation of static/dynamics properties are performed. The proposed system was controlled by capacitive sensor (lion precision, CPL 290), piezo actuator (P-888,91), and dSpace. This flexure mechanism implemented a working range of 200 ㎛, resolution(3σ) of 7.276nm, Inposition(3σ) of 3.503nm, settling time(2%) of 500.133ms by applying a reverse bridge type mechanism and leaf spring guide, and at the same time realized a maximum step difference of 6 ㎛ between die edge and center. The results of this study are applied to the D2W hybrid bonding process and are expected to bring about an effect of increasing semiconductor yield through void removal. In addition, it is expected that it can be utilized as a system that meets the convex variable amount required for each device by adjusting the elongation amount of the piezo actuator coupled to the flexible mechanism in a precise unit.

Application of Data mining for improving and predicting yield in wafer fabrication system (데이터마이닝을 이용한 반도체 FAB공정의 수율개선 및 예측)

  • 백동현;한창희
    • Journal of Intelligence and Information Systems
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    • v.9 no.1
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    • pp.157-177
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    • 2003
  • This paper presents a comprehensive and successful application of data mining methodologies to improve and predict wafer yield in a semiconductor wafer fabrication system. As the wafer fabrication process is getting more complex and the volume of technological data gathered continues to be vast, it is difficult to analyze the cause of yield deterioration effectively by means of statistical or heuristic approaches. To begin with this paper applies a clustering method to automatically identify AUF (Area Uniform Failure) phenomenon from data instead of naked eye that bad chips occurs in a specific area of wafer. Next, sequential pattern analysis and classification methods are applied to and out machines and parameters that are cause of low yield, respectively. Furthermore, radial bases function method is used to predict yield of wafers that are in process. Finally, this paper demonstrates an information system, Y2R-PLUS (Yield Rapid Ramp-up, Prediction, analysis & Up Support), that is developed in order to analyze and predict wafer yield in a korea semiconductor manufacturer.

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Warpage Analysis during Fan-Out Wafer Level Packaging Process using Finite Element Analysis (유한요소 해석을 이용한 팬아웃 웨이퍼 레벨 패키지 과정에서의 휨 현상 분석)

  • Kim, Geumtaek;Kwon, Daeil
    • Journal of the Microelectronics and Packaging Society
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    • v.25 no.1
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    • pp.41-45
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    • 2018
  • As the size of semiconductor chip shrinks, the electronic industry has been paying close attention to fan-out wafer level packaging (FO-WLP) as an emerging solution to accommodate high input and output density. FO-WLP also has several advantages, such as thin thickness and good thermal resistance, compared to conventional packaging technologies. However, one major challenge in current FO-WLP manufacturing process is to control wafer warpage, caused by the difference of coefficient of thermal expansion and Young's modulus among the materials. Wafer warpage induces misalignment of chips and interconnects, which eventually reduces product quality and reliability in high volume manufacturing. In order to control wafer warpage, it is necessary to understand the effect of material properties and design parameters, such as chip size, chip to mold ratio, and carrier thickness, during packaging processes. This paper focuses on the effects of thickness of chip and molding compound on 12" wafer warpage after PMC of EMC using finite element analysis. As a result, the largest warpage was observed at specific thickness ratio of chip and EMC.

Analysis of the shrinkage and warpage of Wafer lens during UV curing (Lens 성형시 UV경화 반응에 따른 수축 및 변형 대한 해석적 접근)

  • Park, Sihwan;Moon, Jong-Sin
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.15 no.11
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    • pp.6464-6471
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    • 2014
  • The UV curing method is a popular process for lens molding on a unit wafer. This process, however, has several drawbacks including wafer adhesion during the ejection process after curing, errors in lens shape and wafer warpage due to material shrinkage during the curing process, and lens centering errors on both sides of a wafer. Among these, the lens shape error and warpage are influenced directly by the UV curing process due to factors including the UV radiation uniformity, the degree of cure according to UV intensity, and the shrinkage characteristics of the material. Therefore, a theory is needed not only to understand the change in the material characteristics, such as the shrinkage rate due to the curing reaction, but also to establish a model. In addition, an analysis system is needed to realize the model. This study proposes a new analysis method for the wafer lens molding process by Comsol modeling. This method was verified by comparing the results with those of the actual process.

Study on the Optimal Release Condition of Wafer Level Molding Process using Plasma Surface Treatment Method (플라즈마 표면처리 방법을 이용한 웨이퍼레벨 몰딩 공정용 기판의 최적 이형조건 도출)

  • Yeon, Simo;Park, Jeonho;Lee, Nukkyu;Park, Sukhee;Lee, Hyejin
    • Journal of Institute of Convergence Technology
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    • v.5 no.1
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    • pp.13-17
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    • 2015
  • In wafer level molding progress, the thermal releasing failure phenomenon is shown up as the important problem. This phenomenon can cause the problem including the warpage, crack of the molded wafer. The thermal releasing failure is due to the insufficiency of adhesion strength degradation of the molding tape. To solve this problem, we studied experimental method increasing the release property of the molding tape through the plasma surface treatment on the wafer substrate. In this research, the vacuum plasma treatment system is used for release property improvement of the molding tape and controls the operating condition of the hydrophilic($O_2$, 100kW, 10min) and hydrophobic($C_2F_6$, 200kW, 10min). In order to perform the peeling test for measuring the releasing force precisely, we remodel the micro scale material property evaluation system developed by Korea institute of industrial technology. In case of hydrophilic surface treatment on the wafer substrate, we can figure out the releasing property of molding tape increase. In order to grasp the effect that it reaches to the release property increase when repeating the hydrophilic treatment, we make an experiment with twice treatment and get the result to increase about 12%. We find out the hydrophilic surface treatment method using plasma can improve releasing property of molding tape in the wafer level molding process.