• Title/Summary/Keyword: Wafer transfer module

Search Result 7, Processing Time 0.02 seconds

A Study on Radiation Heat Transfer of Wafer Transfer Module Using Computational Flow Visualization (전산유동가시화를 활용한 웨이퍼 이송장치의 복사열전달에 관한 연구)

  • Min Gi, Chu;Ji Hong, Chung;Dong Kee, Sohn;Han Seo, Ko
    • Journal of the Korean Society of Visualization
    • /
    • v.20 no.3
    • /
    • pp.58-66
    • /
    • 2022
  • The high heat emitted from the process module and heat jacket may cause errors in semiconductor process equipment. Barriers were designed to reduce the temperature of surface on transfer module. A designed barrier was compared and analyzed by numerical analysis using ANSYS Fluent. The average temperature of barrier and effect of radiation heat transfer were also compared through absorbed radiative heat flux of the barrier. The adoption of the barrier had an effect on the radiative heat transfer reduction of the transfer module rod. The effect of the angles of barrier from 50° to 90° on the heat transfer was investigated using the absorbed radiative heat flux with the average temperature. The angle of barrier of 50° reduced the temperature up to 9.6 %.

Design Optimization of GaAs Wafer Bonding Module (GaAs 웨이퍼 본딩모듈의 최적화 설계)

  • 지원호;송준엽;강재훈;한승우
    • Proceedings of the Korean Society of Precision Engineering Conference
    • /
    • 2003.06a
    • /
    • pp.860-864
    • /
    • 2003
  • Recently. use of compound semiconductor is widely increasing in the area of LED and RF device. In this study, wafer bonding module is designed and optimized to bond 6 inches device wafer and carrier wafer. Bonding process is performed in vacuum environment and resin is used to bond two wafers. Load spreader and double heating mechanisms are adopted to minimize wafer warpage and void. Structure and heat transfer analyses show the designed mechanisms are very effective in performance improvement.

  • PDF

Cluster Tool Module Communication Based on a High-level Fieldbus (고수준 필드버스 기반의 클러스터 툴 모듈 통신)

  • Lee Jin Hwan;Lee Tae Eok;Park Jeong Hyeon
    • Proceedings of the Korean Operations and Management Science Society Conference
    • /
    • 2002.05a
    • /
    • pp.285-292
    • /
    • 2002
  • A cluster tool for semiconductor manufacturing is an integrated device that consists of several single wafer processing modules and a wafer transport module based on a robot. The distributed module controllers are integrated by an inter-module communication network and coordinated by a centralized controller, called a cluster tool controller (CTC). Since the CTC monitors and coordinates the distributed complex module controllers for advanced process control, complex commuication messaging and services between the CTC and the module controllers are required. A SEMI standard, CTMC(Cluster Tool Module Communication), specifies application-level communication service requirements for inter-module communication. We propose the use of high-level fieldbuses, for instance. PROFIBUS-FMS, for implementing CTMC since the high-level fieldbuses are well suited for complex real-time distributed manufacturing control applications. We present a way of implementing CTMC using PROFIBUS-FMS as the communication enabler. We first propose improvements of a key object of CTMC for material transfer and the part transfer protocol to meet the functional requirements of modem advanced cluster tools. We also discuss mapping objects and services of CTMC to PROFIBUS-FMS communication objects and services. Finally, we explain how to implement the mappings.

  • PDF

Cost-effective and High-performance FBAR Duplexer Module with Wafer Level Packaging (웨이퍼 레벨 패키지를 적용한 저가격 고성능 FBAR 듀플렉서 모듈)

  • Bae, Hyun-Cheol;Kim, Sung-Chan
    • Journal of the Korea Institute of Information and Communication Engineering
    • /
    • v.16 no.5
    • /
    • pp.1029-1034
    • /
    • 2012
  • This paper presents a cost-effective and high-performance film bulk acoustic resonator (FBAR) duplexer module for US-PCS handset applications. The FBAR device uses a glass wafer level packaging process, which is a more cost-effective alternative to the typical silicon capping process. The maximum insertion losses of the FBAR duplexer at the Tx and Rx bands are of 1.9 and 2.4 dB, respectively. The total thickness of the duplexer module is 1.2 mm, including the glass-wafer bonded Tx/Rx FBAR devices, PCB board, and transfer molding material.

Simulator of Integrated Single-Wafer Processing Tools with Contingency Handling (예외상황 처리를 고려한 반도체 통합제조장비 시뮬레이터)

  • Kim Woo Seok;Jeon Young Ha;Lee Doo Yong
    • Transactions of the Korean Society of Mechanical Engineers A
    • /
    • v.29 no.1 s.232
    • /
    • pp.96-106
    • /
    • 2005
  • An integrated single-wafer processing tool, composed of multiple single wafer processing modules, transfer robots, and load locks, has complex routing sequences, and often has critical post-processing residency constraints. Scheduling of these tools is an intricate problem, and testing schedulers with actual tools requires too much time and cost. The Single Wafer Processor (SWP) simulator presented in this paper is to validate an on-line scheduler, and evaluate performance of integrated single-wafer processing tools before the scheduler is actually deployed into real systems. The data transfer between the scheduler and the simulator is carried out with TCP/IP communication using messages and files. The developed simulator consists of six modules, i.e., GUI (Graphic User Interface), emulators, execution system, module managers, analyzer, and 3D animator. The overall framework is built using Microsoft Visual C++, and the animator is embodied using OpenGL API (Application Programming Interface).

Development of Automatic Bonding System for GaAs Wafer (GaAs Wafer 접합용 본딩시스템 개발)

  • Song J.Y.;Kang J.H.;Lee C.W.;Ha T.H.;Jee W.H.;Kim W.K.
    • Proceedings of the Korean Society of Precision Engineering Conference
    • /
    • 2005.10a
    • /
    • pp.427-431
    • /
    • 2005
  • In this study, 6' GaAs wafer bonding system is designed and optimized to bond 6 inches device wafer and material wafer. Bonding process is performed in vacuum environment and resin is used to bond two wafers. Vacuum module and double heating mechanisms are adopted to minimize wafer warpage and void. Structure and heat transfer analysis, et al of the core modules review the designed mechanisms are very effective in performance improvement. As a result, high productivity (tack time cut-down) and stabilized process can be obtained by reducing breakage failure of wafer.

  • PDF

차세대 반도체 세정장비 기술동향

  • Jo, Jung-Geun
    • Proceedings of the Korean Society Of Semiconductor Equipment Technology
    • /
    • 2007.09a
    • /
    • pp.42-54
    • /
    • 2007
  • ${\blacksquare}$ 매엽실 세정장비의 양산적용 확대 ${\centerdot}$ 역오염 감소로 수율개선, 짧은 TAT ${\centerdot}$ Throughput 개선필요 : Process Module + Wafer Transfer ${\blacksquare}$ 향후 $2{\sim}3$년 동안 세정기술의 패러다임 변화 예상 ${\centerdot}$ 초미세 패턴에서의 입자 제거 대책 (${\sim}22.5nm$), 신재료에 따른 케미컬 대응 (에칭, 부식, 물성변화). ${\blacksquare}$ 세정기술의 통합 솔루션 필요 ${\centerdot}$ 초임계 유체세정 : 극미세 패턴까지도 대응 가능 ${\centerdot}$ 장비와 공정 측면에서 많은 연구 필요

  • PDF