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http://dx.doi.org/10.3795/KSME-A.2005.29.1.096

Simulator of Integrated Single-Wafer Processing Tools with Contingency Handling  

Kim Woo Seok (한국과학기술원 기계공학과)
Jeon Young Ha (한국과학기술원 기계공학과)
Lee Doo Yong (한국과학기술원 기계공학과)
Publication Information
Transactions of the Korean Society of Mechanical Engineers A / v.29, no.1, 2005 , pp. 96-106 More about this Journal
Abstract
An integrated single-wafer processing tool, composed of multiple single wafer processing modules, transfer robots, and load locks, has complex routing sequences, and often has critical post-processing residency constraints. Scheduling of these tools is an intricate problem, and testing schedulers with actual tools requires too much time and cost. The Single Wafer Processor (SWP) simulator presented in this paper is to validate an on-line scheduler, and evaluate performance of integrated single-wafer processing tools before the scheduler is actually deployed into real systems. The data transfer between the scheduler and the simulator is carried out with TCP/IP communication using messages and files. The developed simulator consists of six modules, i.e., GUI (Graphic User Interface), emulators, execution system, module managers, analyzer, and 3D animator. The overall framework is built using Microsoft Visual C++, and the animator is embodied using OpenGL API (Application Programming Interface).
Keywords
Single-Wafer Processor; Simulation; Contingency Handling;
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