• Proceedings of the Korean Society of Precision Engineering Conference
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• 2013.05a
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• pp.481-482
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• 2013

• 제어로봇시스템학회:학술대회논문집
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• 1997.10a
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• pp.434-437
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• 1997

In this paper, we present an $H^{\infty}$ controller design of RTP system satisfying robust stability and performance using weighted mixed sensitivity minimization. In industrial fields, RTP system is widely used for improving the oxidation and the annealing in semiconductor manufacturing process. The main control factors are temperature control of wafer and uniformity in the wafer. The control of temperature and uniformity has been solved by PI control method. We improve robust stability and performance of RTP system by the design of $H^{\infty}$ controller using the weighted mixed sensivity function. An example is proposed to show the validity of proposed method.d.

• Journal of Practical Engineering Education
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• v.10 no.2
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• pp.125-129
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• 2018

This paper is about the numerical analysis on optimized internal flow of LTP furnace and uniformity of temperature. The LTP Furnace is the device that generates heat by electricity. And performs an annealing function for annealing the silicon wafer in the pre-semiconductor manufacturing process. Especially, the maximum temperature inside the chamber is maintained at a high temperature of about $400^{\circ}C$ to strengthen the wafer. When the process is completed at high temperature, the operation is repeated to reduce the temperature through the heat exchanger and carry it out. From this analysis, the ultimate goal is to derive the optimum design of the insulation volume supply/exhaust structure of the chamber through the flow analysis of the LTPS furnace. And to find cases for curriculum development.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.11a
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• pp.136-139
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• 2004

The requirement of planarity, such as with-in-wafer nonuniformity, post thickness range, have become increasingly stringent as critical dimensions of devices are decreased and a better control of a planarity become important. The key factors influencing the planarity capability of the CMP process have been well understood through numerous related experiments. These usually include parameters such as process pressures, relative velocities, slurry temperature, polishing pad materials and polishing head structure. Many study have been done about polishing pad and its groove structure because it's considered as one of the key factors which can decide wafer uniformity directly. But, not many study have been done about polisher head structure, especially about polisher head plate design. The purpose of this paper is to know how the plate structure can affect wafer uniformity and how to deteriorate wafer yield. Furthermore, we studied several new designed plate to improve wafer uniformity and also improve wafer yield.

• Journal of the Korean Society for Precision Engineering
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• v.19 no.8
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• pp.180-186
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• 2002

Hot Plate is the major unit that it used to remove damp of wafer surface, to strength adhesion of photoresist (PR) and to bake coated PR in FAB process of semiconductor. The badness of Hot Plate (HP) has directly influence upon the performance of wafer, it is necessary to guarantee the performance of HP. In this study, a reliability evaluation system has been designed and developed, which is to measure and to estimate thermal uniformity and flatness of HP in range of temperature 0~$250^\circC$. This system has included the techniques which measures and analyzes thermal uniformity using infrared thermal vision, and which compensates measuring error of flatness using laser displacement sensor For measuring flatness, a measurement stage of 3 axes are developed which adapts the precision encoder. The allowable error of this system in respect of thermal uniformity is less $than\pm0.1^\circC$ and in respect of flatness is less $than\pm$1mm . It is expected that the developed system can measure from $\Phi200mm\;(wafer 8＂)\;to\;\Phi300mm$ (wafer 12＂) and also can be used in performance test of the Cool Plate and industrial heater, etc.

• Journal of Sensor Science and Technology
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• v.16 no.5
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• pp.325-330
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• 2007

For the application to optic devices, wafer level package including spacer with particular thickness according to optical design could be required. In these cases, the uniformity of spacer thickness is important for bonding strength and optical performance. Packaging process has to be performed at low temperature in order to prevent damage to devices fabricated before packaging. And if photosensitive material is used as spacer layer, size and shape of pattern and thickness of spacer can be easily controlled. This paper presents polymer bonding using thick, uniform and patterned spacing layer of SU-8 2100 photoresist for wafer level package. SU-8, negative photoresist, can be coated uniformly by spin coater and it is cured at $95^{\circ}C$ and bonded well near the temperature. It can be bonded to silicon well, patterned with high aspect ratio and easy to form thick layer due to its high viscosity. It is also mechanically strong, chemically resistive and thermally stable. But adhesion of SU-8 to glass is poor, and in the case of forming thick layer, SU-8 layer leans from the perpendicular due to imbalance to gravity. To solve leaning problem, the wafer rotating system was introduced. Imbalance to gravity of thick layer was cancelled out through rotating wafer during curing time. And depositing additional layer of gold onto glass could improve adhesion strength of SU-8 to glass. Conclusively, we established the coating condition for forming patterned SU-8 layer with $400{\mu}m$ of thickness and 3.25 % of uniformity through single coating. Also we improved tensile strength from hundreds kPa to maximum 9.43 MPa through depositing gold layer onto glass substrate.

• Journal of Institute of Control, Robotics and Systems
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• v.5 no.4
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• pp.481-488
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• 1999

A thermal model based on the chamber geometry of the industry-standard AST SHS200MA rapid thermal processing system has been developed for the study of thermal uniformity and process repeatability thermal model combines radiation energy transfer directly from the tungsten-halogen lamps and the steady-state thermal conducting equations. Because of the difficulties of solving partial differential equation, calculation of wafer temperature was performed by using finite-difference approximation. The proposed thermal model was verified via titanium silicidation experiments. As a result, we can conclude that the thermal model show good estimation of wafer surface temperature distribution.

• Journal of the Semiconductor & Display Technology
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• v.10 no.4
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• pp.21-23
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• 2011

Uniformity of plasma etching processes critically depends on the wafer temperature and its distribution. The wafer temperature is affected by plasma, chucking force, He back side pressure and the surface temperature of ESC(electrostatic chuck). In this work, 3D mathematical modeling is used to investigate the influence of the geometry of coolant path and the temperature distribution of the ESC surface. The model that has the coolant path with less change of the cross-sectional area and the curvature shows low standard deviation of the ESC surface temperature distribution than the model with the coolant path of the larger surface area and more geometric change.

• Journal of the Semiconductor & Display Technology
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• v.11 no.2
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• pp.71-74
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• 2012

Uniformity of the wafer temperature is one of the important factors in etching process. Plasma, chucking force, backside helium pressure and the surface temperature of ESC(electrostatic chuck) affect the wafer temperature. ESC consists of several layers of structure. Each layer has own thermal resistance and the Si-adhesive layer has highest thermal resistance among them. In this work, the temperature distribution of ESC was analyzed by 3-D FEM with various defects and the thickness deviation of the Si-adhesive layer. The result with Si-adhesive layer with the low center thickness deviation shows modified temperature distribution of ESC surface.

• Proceedings of the Korean Vacuum Society Conference
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• 1998.02a
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• pp.114-115
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• 1998

Photoreflectance (pR) measurement h have been employed to study the uniformity of G GaAs!Si 3" wafer. The PR shows the energy of l light and heavy hole even at room temperature. F From the observed energy of LH and HH, it can b be seen that the center of the wafer is more s stressed than the 뼈ge. On the basis of biaxial t tensile stress the higher and lower. transitions are a attributed to heavy and light hole respectively.vely.