• 반도체디스플레이기술학회지
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• 제9권1호
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• pp.23-28
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• 2010

In this paper, wafer drop from wafer guide mechanism, which is one of the serious problems in water transfer robot, is analyzed, and new wafer guide mechanisms are proposed to minimize this drop. Three types of new wafer guide mechanisms are proposed: roller type, gear type and L-shape rocker type. We choose one of the proposed mechanism, which is roller type, and verified this mechanism through real transfer experiment. Wafer picking up test is conducted with initial aligning error for simulating the wafer drop. Number of drop is compared between conventional mechanism and proposed mechanism. As a result, we can find the proposed mechanism can reduce the number of wafer drop dramatically.

• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 2012년도 춘계학술대회 논문집
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• pp.811-812
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• 2012

• 한국광학회:학술대회논문집
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• 한국광학회 2007년도 하계학술발표회 논문집
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• pp.65-66
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• 2007

We present a new simple and fast bare-wafer inspection method. This method inspects the wafer front surface and inner structures simultaneously. The wafer surface is inspected using a knife-edge test in visible while the inner structure is inspected by a looking-through camera in infrared, at the same time and with a single white-light source. This paper presents a laboratory implementation of the test method with some experimental results.

• 한국신뢰성학회지:신뢰성응용연구
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• 제16권1호
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• pp.26-31
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• 2016

Purpose: The purpose of this study was to investigate the effect of grinding process and thickness on the fracture strength of silicon die used for semiconductor substrate. Method: Silicon wafers with different thickness from $200{\mu}m$ to $50{\mu}m$ were prepared by chemical mechanical polishing (CMP) and dicing before grinding (DBG) process, respectively. Fracture load was measured by point load test for 50 silicon dies per each wafer. Results: Fracture strength at the center area was lower than that at the edge area of the wafer fabricated by DBG process, while random distribution of the fracture strength was observed for the CMPed wafer. Average fracture strength of DBGed specimens was higher than that of the CMPed ones for the same thickness of wafer. Conclusion: DBG process can be more helpful for lowering fracture probability during the semiconductor fabrication process than CMP process.

• 한국세라믹학회지
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• 제46권1호
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• pp.30-34
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• 2009

A Sand blasting technology has been used to address via and trench processing of glass wafer of optic semiconductor packaging. Manufactured sand blast that is controlled by blast nozzle and servomotor so that 8" wafer processing may be available. 10mm sq test device manufactured by Dry Film Resist (DFR) pattern process on 8" glass wafer of $500{\mu}m's$ thickness. Based on particle pressure and the wafer transfer speed, etch rate, mask erosion, and vertical trench slope have been analyzed. Perfect 500 um tooling has been performed at 0.3 MPa pressure and 100 rpm wafer speed. It is particle pressure that influence in processing depth and the transfer speed did not influence.

• 반도체디스플레이기술학회지
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• 제23권2호
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• pp.107-113
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• 2024

Scheduling of semiconductor test facilities has been crucial since effective scheduling contributes to the profits of semiconductor enterprises and enhances the quality of semiconductor products. This study aims to solve the scheduling problems for the wafer burn-in test facilities of the semiconductor back-end process by utilizing simulation and deep reinforcement learning-based methods. To solve the scheduling problem considered in this study. we propose novel state, action, and reward designs based on the Markov decision process. Furthermore, a neural network is trained by employing the recent RL-based method, named proximal policy optimization. Experimental results showed that the proposed method outperformed traditional heuristic-based scheduling techniques, achieving a higher due date compliance rate of jobs in terms of total job completion time.

• Journal of Mechanical Science and Technology
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• 제20권9호
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• pp.1492-1501
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• 2006

A transportation system of single wafer has been developed to be applied to semiconductor manufacturing process of the next generation. In this study, the experimental apparatus consists of two kinds of track, one is for propelling a wafer, so called control track, the other is for generating an air film to transfer a wafer, so called transfer track. The wafer transportation speed has been evaluated by the numerical and the experimental methods for three types of nozzle position a..ay (i.e., the front-, face- and rear-array) in an air levitation system. Test facility for 300mm wafer has been equipped with two control tracks and one transfer track of 1500mm length from the starting point to the stopping point. From the present results, it is found that the experimental values of the wafer transportation speed are well in agreement with the computed ones. Namely, the computed values of the maximum wafer transportation speed $V_{max}$ are slightly higher than the experimental ones by about $15{\times}20%$. The disparities in $V_{max}$ between the numerical and the experimental results become smaller as the air velocity increases. Also, at the same air flow rate, the order of wafer transportation speeds is : $V_{max}$ for the front-array > $V_{max}$ for the face-array > $V_{max}$ for the rear-array. However, the face-array is rather more stable than any other type of nozzle array to ensure safe transportation of a wafer.

• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 2013년도 춘계학술대회 논문집
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• pp.1259-1260
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• 2013

• 전기학회논문지
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• 제56권12호
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• pp.2217-2220
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• 2007

In this paper, we propose a new wafer level package (WLP) for the RF MEMS applications. The Film Bulk Acoustic Resonator (FBAR) are fabricated and hermetically packaged in a new wafer level packaging process. With the use of Au-Sn eutectic bonding method, we bonded glass cap and FBAR device wafer which has groove-shaped via formed in the backside. The device wafer includes a electrical bonding pad and groove-shaped via for connecting to the external bonding pad on the device wafer backside and a peripheral pad placed around the perimeter of the device for bonding the glass wafer and device wafer. The glass cap prevents the device from being exposed and ensures excellent mechanical and environmental protection. The frequency characteristics show that the change of bandwidth and frequency shift before and after bonding is less than 0.5 MHz. Two packaged devices, Tx and Rx filters, are attached to a printed circuit board, wire bonded, and encapsulated in plastic to form the duplexer. We have designed and built a low-cost, high performance, duplexer based on the FBARs and presented the results of performance and reliability test.

• 한국전기전자재료학회논문지
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• 제25권5호
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• pp.353-360
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• 2012

As semiconductor device technology continuously shrinks, low-open area etch process prevails in front-end etch process, such as contact etch as well as one cylindrical storage (OCS) etch. To eliminate over loaded wafer processing test, it is commonly performed to emply diced small coupons at stage of initiative process development. In nominal etch condition, etch responses of whole wafer test and coupon test may be regarded to provide similar results; however, optical emission spectroscopy (OES) which is frequently utilize to monitor etch chemistry inside the chamber cannot be regarded as the same, especially etch mask is not the same material with wafer chuck. In this experiment, we compared OES data acquired from two cases of etch experiments; one with coupon etch tests mounted on photoresist coated wafer and the other with coupons only on the chuck. We observed different behaviors of OES data from the two sets of experiment, and the analytical results showed that careful investigation should be taken place in OES study, especially in coupon size etch.