• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 2012년도 추계학술대회 논문집
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• pp.621-622
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• 2012

• 제어로봇시스템학회논문지
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• 제19권12호
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• pp.1072-1080
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• 2013

In a the present day, many vision inspection techniques are used in productive industrial areas. In particular, in the semiconductor industry the vision inspection system for wafers is a very important system. Also, inspection techniques for semiconductor wafer production are required to ensure high precision and fast inspection. In order to achieve these objectives, parallel processing of the inspection algorithm is essentially needed. In this paper, we propose the GPU (Graphical Processing Unit)-based parallel processing algorithm for the fast inspection of semiconductor wafers. The proposed algorithm is implemented on GPU boards made by NVIDIA Company. The defect detection performance of the proposed algorithm implemented on the GPU is the same as if by a single CPU, but the execution time of the proposed method is about 210 times faster than the one with a single CPU.

• 제어로봇시스템학회논문지
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• 제5권4호
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• pp.481-488
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• 1999

A thermal model based on the chamber geometry of the industry-standard AST SHS200MA rapid thermal processing system has been developed for the study of thermal uniformity and process repeatability thermal model combines radiation energy transfer directly from the tungsten-halogen lamps and the steady-state thermal conducting equations. Because of the difficulties of solving partial differential equation, calculation of wafer temperature was performed by using finite-difference approximation. The proposed thermal model was verified via titanium silicidation experiments. As a result, we can conclude that the thermal model show good estimation of wafer surface temperature distribution.

• 소성∙가공
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• 제14권5호
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• pp.477-481
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• 2005

Wafer scale micro mirror array with high surface quality for small form factor (SFF) optical pick-up was fabricated by micro UV-molding. To replicate micro mirror array for SFF optical pick-up, a high- precision mold was fabricated using micro-machining technology. Wafer scale micro mirror array was UV-molded using the mold and then the process was optimized experimentally. The surface flatness and roughness of UV-molded micro mirror array were measured by white light scanning interferomety system and analyzed the transcribing characteristics. Finally, the measured flatness of UV-molded micro mirror away for SFF optical pick-up, which was fabricated in the optimum processing condition, was less than 70nm.

• 한국레이저가공학회지
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• 제5권2호
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• pp.9-15
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• 2002

Basic principles and unique characteristics of laser-induced shock cleaning have been described compared to a conventional laser cleaning method and the removal of small tungsten particles from silicon wafer surfaces was attempted using both methods. It was found that the conventional laser cleaning was not feasible to remove the tungsten particles whereas a successful removal of the particles was carried out by the laser-induced shock waves. From the quantitative analysis using a surface scanner, the average removal efficiency of the particles was more than 98% where smaller particles were slightly more difficult to remove probably due to the increased adhesion force with a decrease of the particle size. It was also seen that the gap distance between the laser focus and the wafer surface is an important processing parameter since the removal efficiency is strongly dependent on the gap distance.

• 한국멀티미디어학회논문지
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• 제13권3호
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• pp.400-409
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• 2010

본 논문에서는 반도체 생산 공정 중 클리닝 공정 설비에서, 웨이퍼의 장착 위치를 인식하는 영상 인식 시스템을 제안한다. 제안한 시스템은 웨이퍼의 위치 이탈에 따른 위치오차 발생 시 이를 클리닝 설비에 전달하여, 웨이퍼 클리닝 장비의 파손을 방지하여 시스템의 신뢰성과 경제성을 높이기 위한 것이다. 시스템의 주요 알고리즘은 카메라에 획득된 영상과 실제 웨이퍼간의 캘리브레이션 방법, 적외선 조명 및 필터 설계, 최소자승법 기반의 원 생성알고리즘에 의한 중심위치 판별법이다. 제안한 시스템은 고 신뢰성과 고 정밀의 위치인식 알고리즘을 사용하여, 효율적으로 웨이퍼 인라인 공정에 설치함을 목표로 하며 실험결과 충분한 허용 기준 내에서 오차를 검출해내는 좋은 성능을 보여준다.

• 한국시뮬레이션학회논문지
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• 제8권3호
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• pp.49-66
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• 1999

Semiconductor wafer fabrication is known to be one of the most complex manufacturing processes due to process intricacy, random yields, product diversity, and rapid changing technologies. In this study we are concerned with the impact of lot release and dispatching policies on the performance of semiconductor wafer fabrication facilities. We consider several semiconductor wafer fabrication environments according to the machine failure types such as no failure, normal MTBF, bottleneck with low MTBF, high randomness, and high MTBF cases. Lot release rules to be considered are Deterministic, Poisson process, WR(Workload Regulation), SA(Starvation Avoidance), and Multi-SA. These rules are combined with several dispatching rules such as FIFO (First In First Out), SRPT (Shortest Remaining Processing Time), and NING/M(smallest Number In Next Queue per Machine). We applied the combined policies to each of semiconductor wafer fabrication environments. These policies are assessed in terms of throughput and flow time. Basically Weins fabrication setup was used to make the simulation models. The simulation parameters were obtained through the preliminary simulation experiments. The key results throughout the simulation experiments is that Multi-SA and SA are the most robust rules, which give mostly good performance for any wafer fabrication environments when used with any dispatching rules. The more important result is that for each of wafer fabrication environments there exist the best and worst choices of lot release and dispatching policies. For example, the Poisson release rule results in the least throughput and largest flow time without regard to failure types and dispatching rules.

• 한국주조공학회지
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• 제33권4호
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• pp.157-161
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• 2013

A ribbon-type polycrystalline silicon wafer was directly fabricated from liquid silicon via a novel technique for both a fast growth rate and large grain size by exploiting gas pressure. Effects of processing parameters such as moving speed of a dummy bar and the length of the solidification zone on continuous casting of the silicon wafer were investigated. Silicon melt extruded from the growth region in the case of a solidification zone with a length of 1cm due to incomplete solidification. In case of a solidification zone wieh a length of 2 cm, on the other hand, continuous casting of the wafer was impossible due to the volume expansion of silicon derived from the liquid-solid transformation in solidification zone. Consequently, the optimal length of the solidification zone was 1.5 cm for maintaining the position of the solid-liquid interface in the solidification zone. The silicon wafer could be continuously casted when the moving speed of the dummy bar was 6 cm/min, but liquid silicon extruded from the growth region without solidification when the moving speed of the dummy bar was ${\geq}$ 9 cm/min. This was due to a shift of the position of the solid-liquid interface from the solidification zone to the moving area. The present study reports experimental findings on a new direct growth system for obtaining silicon wafers with both high quality and productivity, as a candidate for an alternate route for the fabrication of ribbon-type silicon wafers.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1996년도 추계학술대회 논문집 학회본부
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• pp.254-257
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• 1996

A Rapid Thermal Processing (RTP) system operated below $500^{\circ}C$ has been designed and constructed. It uses an optical pyrometer for measuring wafer temperature, the sensing range of pyrometer is from $2.0{\mu}m$ to $2.4{\mu}m$. To remove the interference effect by IR emitted from lamps an IR filter is adapted which uses water. The best condition for Al alloy using the RTP system is $425^{\circ}C$ for ten seconds. The RTP system uses many lamps for supplying enough power in processing wafer because the absorption wavelength range of IF filter is from $1.3{\mu}m$ to $4.0{\mu}m$. However, reproducibility and uniformity is reduced due to the difference of lamp characteristics. Therefore, for improving the reproducibility and uniformity new RTP system using one lamp is designed. The new RTP system uses a focusing mirror and it focuses the light of lamp. The curverture of the focusing mirror is controlled to supply uniform power in processing wafer. The result of computer simulation shows the possibility of new RTP system using one lamp.

• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 2009년도 춘계학술대회 논문집
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• pp.419-420
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• 2009