• Transactions of Materials Processing
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• v.15 no.1 s.82
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• pp.9-14
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• 2006

In the present research, the simultaneous punching of ultra small size hole of $2\~10\;{\mu}m$ in diameter on flat rolled thin metal foils was conducted with elastic polymer punch. Workpiece used in the present investigation were the rolled pure copper of $3{\mu}m$ in thickness and CP titanium of 1.5fm in thickness. The metal foils were punched with the dies and arrays of circular and rectangular holes were made. The process set-up is similar to that of the flexible rubber pad farming or Guerin process. Arrays of holes were punched successfully in one step forming. The punched holes were examined in terms of their dimensions. The effects of the wafer die hole dimension and heat treatment of the workpiece on ultra small size hole formation of the thin foil were discussed. The process condition such as proper die shape, pressure, pressure rate and diameter-thickness ratio (d/t) were also discussed. The results in this paper show that the present method can be successfully applied to the fabrication of ultra small size hole away in a one step operation.

• Advances in nano research
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• v.2 no.1
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• pp.23-56
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• 2014

The significant growth of the Si photovoltaic industry has been so far limited due to the high cost of the Si photovoltaic system. In this regard, the most expensive factors are the intrinsic cost of silicon material and the Si solar cell fabrication processes. Conventional Si solar cells have p-n junctions inside for an efficient extraction of light-generated charge carriers. However, the p-n junction is normally formed through very expensive processes requiring very high temperature (${\sim}1000^{\circ}C$). Therefore, several systems are currently under study to form heterojunctions at low temperatures. Among them, carbon nanotube (CNT)/Si hybrid solar cells are very promising, with power conversion efficiency up to 15%. In these cells, the p-type Si layer is replaced by a semitransparent CNT film deposited at room temperature on the n-doped Si wafer, thus giving rise to an overall reduction of the total Si thickness and to the fabrication of a device with cheaper methods at low temperatures. In particular, the CNT film coating the Si wafer acts as a conductive electrode for charge carrier collection and establishes a built-in voltage for separating photocarriers. Moreover, due to the CNT film optical semitransparency, most of the incoming light is absorbed in Si; thus the efficiency of the CNT/Si device is in principle comparable to that of a conventional Si one. In this paper an overview of several factors at the basis of this device operation and of the suggested improvements to its architecture is given. In addition, still open physical/technological issues are also addressed.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.07b
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• pp.830-833
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• 2003

This paper describes the fabrication and characteristics of 3C-SiCOI sotctures by SDB and etch-back technology for high-temperature MEMS applications. In this work, insulator layers were formed on a heteroepitaxial 3C-SiC film grown on a Si(001) wafer by thermal wet oxidation and PECVD process, successively. The pre-bonding of two polished PECVD oxide layers made the surface activation in HF and bonded under applied pressure. The wafer bonding characteristics were evaluated by the effect of HF concentration used in the surface treatment on the roughness of the oxide and pre-bonding strength. Hydrophilic character of the oxidized 3C-SiC film surface was investigated by ATR-FTIR. The strength of the bond was measured by tensile strengthmeter. The bonded interface was also analyzed by SEM. The properties of fabricated 3C-SiCOI structures using etch-back technology in TMAH solution were analyzed by XRD and SEM. These results indicate that the 3C-SiCOI structure will offers significant advantages in the high-temperature MEMS applications.

• Proceedings of the KIEE Conference
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• 1998.07d
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• pp.1361-1363
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• 1998

Poly-Si grain boundaries act as potential barriers as well as recombination centers for the photo-generated carriers in solar cells. Thereby, grain boundaries of poly-Si are considered as a major source of the poly-Si cell efficiency was reduced This paper investigated grain boundary effect of poly-Si wafer prior to the solar cell fabrication. By comparing I-V characteristics inner grain, on and across the grain boundary, we were able to detect grain potentials. To reduce grain boundary effect we carried out pretreatment, $POCl_3$ gettering, and examined carrier lifetime. This paper focuses on resistivity variation effect due to grain boundary of poly-Si. The resistivity of the inner grain was $2.2{\Omega}-cm$, on the grain boundary$2.3{\Omega}-cm$, across the grain boundary $2.6{\Omega}-cm$. A measured resistivity varied depending on how many grains were included inside the four point probes. The resistivity increased as the number of grain boundaries increased. Our result can contribute to achieve high conversion efficiency of poly-Si solar cell by overcoming the grain boundary influence.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2000.05b
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• pp.7-12
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• 2000

This paper presents the electrochemical etch-stop characteristics of single-crystal silicon in a tetramethyl ammonium hydroxide(TMAH):isopropyl alcohol(IPA):pyrazine solution. Addition of pyrazine to a TMAH:IPA etchant increases the etch-rate of (100) silicon, thus the elapsed time for etch-stop was shortened. The current-voltage (I-V) characteristics of n- and p-type silicon in a TMAH:IPA:pyrazine solution were obtained, respectively. Open circuit potential(OCP) and passivation potential(PP) of n- and p-type silicon, respectively, were obtained and applied potential was selected between n- and p-type silicon PP. The electrochemical etch-stop is applied to the fabrication of 801 microdiaphragms having $20{\mu}m$ thickness on a 5-inch silicon wafer. The averge thicknesses of 801 microdiaphragms fabricated on the one wafer were $20.03{\mu}m$ and standard deviation was ${\pm}0.26{\mu}m$. The silicon surface of the etch-stopped microdiaphragm was extremely flat without noticeable taper or other nonuniformities. The benefits of the electrochemical etch-stop in a TMAH:IPA:pyrazine solution become apparent when reproducibility in the microdiaphragm thickness for mass production is considered. These results indicate that the electrochemical etch-stop in a TMAH:IPA:pyrazine solution provides a powerful and versatile alternative process for fabricating high-yield silicon microdiaphragms.

• Journal of Korean Institute of Industrial Engineers
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• v.23 no.1
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• pp.129-146
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• 1997

In traditional approaches to scheduling problems, a single dispatching rule was used by all machines in a system. However, since the situation of each machine generally differs from those of other machines, it is reasonable to apply a different dispatching rule to each machine responding to its given situation. In this regard, we introduce the concept of spatial adaptation and examine its effectiveness by simulation. In the spatial adaptation, each machine in a system selects an appropriate dispatching rule in order to improve productivity while it strives to be in harmony with other machines. This study proposes an adaptive procedure which produces a reliable dispatching rule for each machine beginning with the bottleneck machine. The dispatching rule is composed of several criteria of which priorities are adaptively weighted. The weights are learned for each machine through systematic simulations. The simulations are conducted according to a Taguchi experimental design in order to find appropriate sets of criteria weights in an efficient and robust way in the context of environmental variations. The proposed method was evaluated in an application to a semiconductor wafer fabrication system. The method achieved reliable performance compared to traditional dispatching rules, and the performance quickly approached the peak after learning for only a few bottleneck machines.

• Journal of Korean Society of Occupational and Environmental Hygiene
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• v.22 no.1
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• pp.52-59
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• 2012

Objectives: The purpose of this study was to evaluate the exposure possibility of by-products during the semiconductor manufacturing processes. Methods: The authors investigated types of chemicals generated during semiconductor manufacturing processes by the qualitative experiment on generation of by-products at the laboratory and a literature survey. Results: By-products due to decomposition of photoresist by UV-light during the photo-lithography process, ionization of arsine during the ion implant process, and inter-reactions of chemicals used at diffusion and deposition processes can be generated in wafer fabrication line. Volatile organic compounds (VOCs) such as benzene and formaldehyde can be generated during the mold process due to decomposition of epoxy molding compound and mold cleaner in semiconductor chip assembly line. Conclusions: Various types of by-products can be generated during the semiconductor manufacturing processes. Therefore, by-products carcinogen such as benzene, formaldehyde, and arsenic as well as chemical substances used during the semiconductor manufacturing processes should be controlled carefully.

• Journal of Sensor Science and Technology
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• v.28 no.4
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• pp.251-255
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• 2019

We propose a two-step lithography process to minimize edge-bead issues caused by thick photoresist (PR) coating. In the conventional PR process, the edge bead can be efficiently removed by applying an edge-bead removal (EBR) process while rotating the silicon wafer at a high speed. However, applying conventional EBR to the production of desired PR mold with unique negative patterns cannot be used because a lower rpm of spin coating and a lower temperature in the soft bake process are required. To overcome this problem, a two-step lithography process was developed in this study and applied to the fabrication of a polydimethylsiloxane (PDMS) film having super-hydrophobic characteristics. Following UV exposure with a first photomask, the exposed part of the silicon wafer was selectively removed by applying a PR developer while rotating at a low rpm. Then, unique PR mold structures were prepared by employing an additional under-exposure process with a second mask, and the mold patterns were transferred to the PDMS. Results showed that the fabricated PDMS film based on the two-step lithography process reduced the height difference from 23% to 5%. In addition, the water contact angle was greatly improved by spraying of hydrophobic nanosilica on the dual-scaled PDMS surface.

• Journal of the Korean Society for Precision Engineering
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• v.25 no.1
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• pp.138-144
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• 2008

Micro-machining of a brittle material such as glass, silicon, etc., is important in micro fabrication. Particularly, micro-abrasive jet machining (${\mu}-AJM$) has become a useful technique for micro-machining of such materials. The ${\mu}-AJM$ process is mainly based on the erosion of a mask which protects brittle substrate against high velocity of micro-particle. Therefore, fabrication of an adequate mask is very important. Generally, for the fabrication of a mask in the ${\mu}-AJM$ process, a photomask based on the semi-conductor fabrication process was used. In this research a rapid mask fabrication technology has been developed for the ${\mu}-AJM$. By scanning the focused UV laser beam, a micro-mask pattern was fabricated directly without photolithography process and photomask. Two kinds of mask patterns were fabricated using SU-8 and photopolymer (Watershed 11110). Using fabricated mask patterns, abrasive-jet machining of Si wafer were conducted successfully.

• Transactions of the Korean Society of Mechanical Engineers A
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• v.34 no.12
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• pp.1857-1863
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• 2010

We present the fabrication and characterization of transparent carbon nanotube film (CNF) piezoresistors. CNFs were fabricated by vacuum filtration methods with 65?92% transmittance and patterned on Au-deposited silicon wafer by photolithography and dry etching. The patterned CNFs were transferred onto poly-dimethysiloxane (PDMS) using the weak adhesion property between the silicon wafer and the Au layer. The transferred CNFs were confirmed to be piezoresistors using the equation of concentrated-force-derived resistance change. The gauge factor of the CNFs was measured to range from 10 to 20 as the resistance of the CNFs increased with applied pressure. In polymer microelectromechanical systems, CNF piezoresistors are the promising materials because of their high sensitivity and low-temperature process.