• Korean Journal of Optics and Photonics
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• v.4 no.1
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• pp.15-21
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• 1993

This paper describes the design and development of a KrF excimer laser stepper and discusses the detailed system parameters and characterization data obtained from the performance test. We have developed a deep UV step-and-repeat system, operating at 248 nm, by retrofitting a commercial modules such as KrF excimer laser, precision wafer stage and fused silica illumination and 5X projection optics of numerical aperture 0.42. What we have developed, to the basic structure, are wafer alignment optics, reticle alignment system, autofocusing/leveling mechanisms and environment chamber. Finally, all these subsystem were integrated under the control of microprocessor-based controllers and computer. The wafer alignment system comprises the OFF-AXIS and the TTL alignment. The OFF-AXIS alignment system was realized with two kinds of optics. One is the magnification system with the image processing technique and the other is He-Ne laser diffraction type system using the alignment grating on the wafer. 'The TTL alignment system employs a dual beam inteferometric method, which takes advantages of higher diffraction efficiency compared with other TTL type alignment systems. As the results, alignment accuracy for OFF-AXIS and TTL alignment system were obtained within 0.1 $\mu\textrm{m}$/ 3 $\sigma$ for the various substrate on the wafers. The wafer focusing and leveling system is modified version of the conventional systems using position sensitive detectors (PSD). This type of detection method showed focusing and leveling accuracies of about $\pm$ 0.1 $\mu\textrm{m}$ and $\pm$ 0.5 arcsec, respectively. From the CD measurement, we obtained 0.4 $\mu\textrm{m}$ resolution features over the full field with routine use, and 0.3 $\mu\textrm{m}$ resolution was attainable under more strict conditions.

• Journal of the Semiconductor & Display Technology
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• v.20 no.4
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• pp.119-124
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• 2021

In a situation where Moore's law, which states that the performance of semiconductor integrated circuits doubles every two years, is showing a limit from a certain point, and it is difficult to increase the performance due to the limitations of exposure technology.In this study, a wafer hybrid method that can increase the degree of integration Various research on bonding technology is currently in progress. In this study, in order to achieve rotational precision between wafers in wafer hybrid bonding technology, modeling of θ_z alignment stage and VCM actuator modeling used for rotational alignment, magnetic field analysis and desgin, control, and evaluation are performed. The system of this study was controlled by VCM actuator, capactive sensor, and dspace, and the working range was ±7200 arcsec, and the in-position and resoultion were ±0.01 arcsec. The results of this study confirmed that safety and precise control are possible, and it is expected to be applied to the process to increase the integration.

• Journal of the Korean Society for Precision Engineering
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• v.31 no.10
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• pp.865-871
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• 2014

Paradigm shift to 3-D chip stacking in electronic packaging has induced a lot of integration challenges due to the reduction in wafer thickness and pitch size. This study presents a hybrid bonding technology by self-alignment effect in order to improve the flip chip bonding accuracy with ultra-thin wafer. Optimization of Cu pillar bump formation and evaluation of various factors on self-alignment effect was performed. As a result, highly-improved bonding accuracy of thin wafer with a $50{\mu}m$ of thickness was achieved without solder bridging or bump misalignment by applying reflow process after thermo-compression bonding process. Reflow process caused the inherently-misaligned micro-bump to be aligned due to the interface tension between Si die and solder bump. Control of solder bump volume with respect to the chip dimension was the critical factor for self-alignment effect. This study indicated that bump design for 3D packaging could be tuned for the improvement of micro-bonding quality.

• Journal of the Semiconductor & Display Technology
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• v.22 no.4
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• pp.108-112
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• 2023

Precision manufacturing technology is rapidly developing due to the extreme miniaturization of semiconductor processes to comply with Moore's Law. Accurate and precise alignment, which is one of the key elements of the semiconductor pre-process and post-process, is very important in the semiconductor process. The center detection of wafer align marks plays a key role in improving yield by reducing defects and research on accurate detection methods for this is necessary. Methods for accurate alignment using traditional image sensors can cause problems due to changes in image brightness and noise. To solve this problem, engineers must go directly into the line and perform maintenance work. This paper emphasizes that the development of AI technology can provide innovative solutions in the semiconductor process as high-resolution image and image processing technology also develops. This study proposes a new wafer center detection method through variable thresholding. And this study introduces a method for detecting the center that is less sensitive to the brightness of LEDs by utilizing a high-performance object detection model such as YOLOv8 without relying on existing algorithms. Through this, we aim to enable precise wafer focus detection using artificial intelligence.

• Journal of the Semiconductor & Display Technology
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• v.16 no.1
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• pp.29-33
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• 2017

This paper presents a development of vision aligner with three channels for the wafer and plate bonding machine in manufacturing of LED. The developed vision aligner consists of three cameras and performs wafer alignment of rotation and translation, flipped wafer detection, and UV Tape detection on the target wafer and plate. Normally the process step of wafer bonding is not defined by standards in semiconductor's manufacturing which steps are used depends on the wafer types so, a lot of processing steps has many unexpected problems by the workers and environment of manufacturing such as the above mentioned. For the mass production, the machine operation related to production time and worker's safety so the operation process should be operated at one time with considering of unexpected problem. The developed system solved the 4 kinds of unexpected problems and it will apply on the massproduction environment.

• Transactions of The Korea Fluid Power Systems Society
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• v.8 no.3
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• pp.14-20
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• 2011

This study aims at aligning multiple wafers to reduce wafer handling time in wafer processes. We designed a multilevel structure for a prealigner which can handle multiple wafer simultaneously in a system. The system consists of gripping parts, kinematic parts, vacuum chucks, pneumatic units, hall sensors and a DSP controller. Aligning procedure has two steps: mechanical gripping and notch finding. In the first step, a wafer is aligned in XY directions using 4-point mechanical contact. The rotational error can be found by detecting a signal in a notch using hall sensors. A dual prealigner was designed for 300mm wafers and constructed for a performance test. The accuracy was monitored by checking the movement of a notch in a machine vision. The result shows that the dual prealigner has enough performance as commercial products.

• Journal of IKEEE
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• v.23 no.2
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• pp.594-598
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• 2019

We demonstrate an alternative alignment process using transferring process on solution driven HfZnO film. Parallel pattern is firstly fabricated on a silicon wafer by laser interference lithography. Prepared HfZnO solution fabricated by sol-gel process is spin-coated on a glass substrate. The silicon wafer with parallel pattern is placed on the HfZnO film and annealed at $100^{\circ}C$ for 30 min. After transferring process, parallel grooves on the HfZnO film is obtained which is confirmed by atomic force microscopy and scanning electron microscopy. Uniform liquid crystal alignment is achieved which is attributed to an anisotropic characteristic of HfZnO film by parallel grooves. The liquid crystal cell exhibited a pretilt angle of $0.25^{\circ}$ which showed a homogeneous alignment property.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.32 no.5
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• pp.357-360
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• 2019

We demonstrate an alignment technology using an imprinting process on an inorganic NiOx film. The aligned nanopattern was fabricated on a silicon wafer by laser interference lithography. The aligned nano pattern was then imprinted onto the sol-gel driven NiOx film using an imprinting process at an annealing temperature of $150^{\circ}C$. After the imprinting process, parallel grooves had been formed on the NiOx film. Atomic force microscopy and water contact angle measurements were performed to confirm the parallel groove on the NiOx film. The grooves caused liquid crystal alignment through geometric restriction, similar to grooves formed by the rubbing process on polyimide. The liquid crystal cell exhibited a pretilt angle of $0.2^{\circ}$, which demonstrated homogeneous alignment.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2003.09a
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• pp.261-278
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• 2003

Concepts.Wafer-Level Chip-Scale Concept with Handling Substrate.Low Accuracy Placement Layout with Isolation Trench.Possible Pitch of Interconnections down to $10{\mu}{\textrm}{m}$ (Sn-Grains).Wafer-to-Wafer Equipment Adjustment Accuracy meets this Request of Alignment Accuracy (+/-1.5 ${\mu}{\textrm}{m}$).Adjustment Accuracy of High-Speed Chip-to-Wafer Placement Equipment starts to meet this request.Face-to-Face Modular / SLID with Flipped Device Orientation.interchip Via / SLID with Non-Flipped Orientation SLID Technology Features.Demonstration with Copper / Tin-Alloy (SLID) and W-InterChip Vias (ICV).Combination of reliable processes for advanced concept - Filling of vias with W as standard wafer process sequence.No plug filling on stack level necessary.Simultanious formation of electrical and mechanical connection.No need for underfiller: large area contacts replace underfiller.Cu / Sn SLID layers $\leq$ $10{\mu}{\textrm}{m}$ in total are possible Electrical Results.Measurements of Three Layer Stacks on Daisy Chains with 240 Elements.2.5 Ohms per Chain Element.Contribution of Soldering Metal only in the Range of Milliohms.Soldering Contact Resistance ($0.43\Omega$) dominated by Contact Resistance of Barrier and Seed Layer.Tungsten Pin Contribution in the Range of 1 Ohm

• Journal of Sensor Science and Technology
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• v.21 no.2
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• pp.121-126
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• 2012

Piezoresistive type contact force sensor array is fabricated by (111) Silicon bulk micromachining for continuous blood pressure monitoring. Length and width of the unit sensor structure is $200{\mu}m$ and $190{\mu}m$, respectively. The gap between sensing elements is only $10{\mu}m$. To achieve wafer level packaging, the sensor structure is capped by PDMS soft cap using wafer molding and bonding process with $10{\mu}m$ alignment precision. The resistance change over contact force was measured to verify the feasibility of the proposed sensor scheme. The maximum measurement range and resolution is 900 mm Hg and 0.57 mm Hg, respectively.