• Title/Summary/Keyword: Voltage-controlled Oscillator

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Power Consumption Change in Transistor Ratio of Ring Voltage Controlled Oscillator (링 전압 제어 발진기의 트랜지스터 비율에 따른 소모 전력 변화)

  • Moon, Dongwoo;Shin, Hooyoung;Lee, Milim;Kang, Inseong;Lee, Changhyun;Park, Changkun
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.27 no.2
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    • pp.212-215
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    • 2016
  • In this paper, a 5.08 GHz Ring Voltage Controlled Oscillator(Ring VCO) was implemented using $0.18{\mu}m$ standard CMOS technology. The proposal Ring VCO is 3-stage structure. This research confirmed that the each stage's different transistor size ratio influence the current change and alter power consumption consequentially. This circuit is formed to control the current thereby adding the Current Mirror and to tune the frequency by supplying control voltage. It has an 65.5 %(1.88~5.45 GHz) tuning range. The measured output power is -0.30 dBm. The phase noise is -87.50 dBc/Hz @1 MHz offset with operating frequency of 5.08 GHz fundamental frequency. The total power consumption of Ring VCO is 31.2 mW with 2.4 V supply voltage.

10 GHz LC Voltage-controlled Oscillator with Amplitude Control Circuit for Output Signal (출력 신호의 진폭 제어 회로를 가진 10 GHz LC 전압 제어 발진기)

  • Song, Changmin;Jang, Young-Chan
    • Journal of IKEEE
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    • v.24 no.4
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    • pp.975-981
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    • 2020
  • A 10 GHz LC voltage-controlled oscillator (VCO), which controls an amplitude of output signal, is proposed to improve the phase noise. The proposed amplitude control circuit for the LC VCO consists of a peak detector, an amplifier, and a current source. The peak detector is performed detecting the lowest voltage of the output signal by using two diode-connected NMOSFET and a capacitor. The proposed 10 GHz LC VCO with an amplitude control circuit for output signal is designed using a 55 nm CMOS process with a supply voltage of 1.2 V. Its area is 0.0785 ㎟. The amplitude control circuit used in the proposed LC VCO reduces the amplitude variation 242 mV generated in the output signal of the conventional LC VCO to 47 mV. Furthermore, it improves the peak-to-peak time jitter from 8.71 ps to 931 fs.

A CMOS Frequency Synthesizer for 5~6 GHz UNII-Band Sub-Harmonic Direct-Conversion Receiver

  • Jeong, Chan-Young;Yoo, Chang-Sik
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.9 no.3
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    • pp.153-159
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    • 2009
  • A CMOS frequency synthesizer for $5{\sim}6$ GHz UNII-band sub-harmonic direct-conversion receiver has been developed. For quadrature down-conversion with sub-harmonic mixing, octa-phase local oscillator (LO) signals are generated by an integer-N type phase-locked loop (PLL) frequency synthesizer. The complex timing issue of feedback divider of the PLL with large division ratio is solved by using multimodulus prescaler. Phase noise of the local oscillator signal is improved by employing the ring-type LC-tank oscillator and switching its tail current source. Implemented in a $0.18{\mu}m$ CMOS technology, the phase noise of the LO signal is lower than -80 dBc/Hz and -113 dBc/Hz at 100 kHz and 1MHz offset, respect-tively. The measured reference spur is lower than -70 dBc and the power consumption is 40 m W from a 1.8 V supply voltage.

Development of the VCXO with the PECL

  • Hong, Seung-Jin;Lee, Jae-Kyung;Yoon, Dal-Hwan;Min, Seung-Gi
    • 제어로봇시스템학회:학술대회논문집
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    • 2003.10a
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    • pp.1885-1890
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    • 2003
  • In this paper, we have developed the voltage controlled crystal oscillator (VCXO) with positive emitter coupled logic(PECL). The VCXO is a crystal oscillator which includes a varactor diode and associated circuitry allowing the frequency to be changed by application of a voltage across that diode. The characteristics of the PECL has the delay time less than 2 ns and the faster logic gate, and the high level output greater than 2.3 V and the low level output smaller than 1.68 V.

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A Study on a Chaotic Oscillator Circuit with CdS Cell (CdS 셀을 이용한 카오스 발진기 회로 연구)

  • 박민서;정동호;정경택
    • Proceedings of the IEEK Conference
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    • 2000.06e
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    • pp.73-76
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    • 2000
  • We study the Chua oscillator circuit by considering a negative resistor as a characteristic parameter which controlled by the CdS(Cadmium Sulphide) cell. This is a new way to observe several chaotic phenomena with the same initial condition continuously. Since we can control the internal resistance of the CdS cell by an additional circuit, our autonomous chaotic oscillator circuit makes it possible to measure the voltage value continuously and automatically.

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Implementation of RF Oscillator Using Microstrip Split Ring Resonator (SRR) (마이크로스트립 분리형 링 공진기를 이용한 RF 발진기 구현)

  • Kim, Girae
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.17 no.2
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    • pp.273-279
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    • 2013
  • In this paper, a novel split ring resonator is proposed for improvement of phase noise characteristics that is weak point of oscillator using planar type microstrip line resonator, and oscillator for 5.8GHz band is designed using proposed split ring resonator. At the fundamental frequency of 5.8GHz, 7.22dBm output power and -83.5 dBc@100kHz phase noise have been measured for oscillator with split ring resonator. The phase noise characteristics of oscillator is improved about 9.7dB compared to one using the general ${\lambda}$/4 microstrip resonator. Because it is possible that varactor diode or lumped capacitor is placed on the gaps of split ring resonator, resonant frequency can be controlled by bias voltage. We can design voltage controlled oscillator using proposed split ring resonator. Thus, due to its simple fabrication process and planar type, it is expected that the technique in this paper can be widely used for low phase noise oscillators for both MIC and MMIC applications.

RF Oscillator Improved Characteristics of Phase Noise Using Ring type DGS (위상잡음을 개선한 링형 DGS 공진기를 이용한 RF 발진기)

  • Kim, Gi-Rae
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.16 no.8
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    • pp.1581-1586
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    • 2012
  • In this paper, a novel resonator using ring type DGS is proposed for improvement of phase noise characteristics that is weak point of oscillator using planar type microstrip line resonator, and oscillator for 5.8GHz band is designed using proposed DGS resonator. The ring type DGS resonator is composed of DGS cell etched on ground plane under $50{\Omega}$ microstrip line. At the fundamental frequency of 5.8GHz, 7.6dBm output power and -82.7 dBc@100kHz phase noise have been measured for oscillator with ring type DGS resonator. The phase noise characteristics of oscillator is improved about 9.5dB compared to one using the general ${\lambda}/4$ microstrip resonator. Because it is possible that varactor diode or lumped capacitor is placed on the gaps of ring type DGS, resonant frequency can be controlled by bias voltage. We can design voltage controlled oscillator using proposed ring type DGS resonator. Thus, due to its simple fabrication process and planar type, it is expected that the technique in this paper can be widely used for low phase noise oscillators for both MIC and MMIC applications.

Implementation of Voltage Controlled Oscillator Using Planar Structure Split Ring Resonator (SRR) (평면형 구조의 분리형 링 공진기를 이용한 전압제어 발진기 구현)

  • Kim, Gi-Rae
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.17 no.7
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    • pp.1538-1543
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    • 2013
  • In this paper, a novel split ring resonator is proposed for improvement of phase noise characteristics that is weak point of oscillator using planar type microstrip line resonator. Oscillator using proposed split ring resonator is designed, it has improved phase noise characteristics. At the fundamental frequency of 5.8GHz, 7.22dBm output power and -83.5 dBc@100kHz phase noise have been measured for oscillator with split ring resonator. The phase noise characteristics of oscillator is improved about 9.7dB compared to one using the general ${\lambda}/4$ microstrip resonator. Next, we designed voltage controlled oscillator using proposed split ring resonator with varactor diode. The VCO has 125MHz tuning range from 5.833GHz to 5.845GHz, and phase noise characteristic is -118~-115.5 dBc/Hz@100KHz. Due to its simple fabrication process and planar type, it is expected that the technique in this paper can be widely used for low phase noise oscillators for both MIC and MMIC applications.

A Design of Voltage Controlled Oscillator and High Speed 1/4 Frequency Divider using 65nm CMOS Process (65nm CMOS 공정을 이용한 전압제어발진기와 고속 4분주기의 설계)

  • Lee, Jongsuk;Moon, Yong
    • Journal of the Institute of Electronics and Information Engineers
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    • v.51 no.11
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    • pp.107-113
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    • 2014
  • A VCO (Voltage Controlled Oscillator) and a divide-by-4 high speed frequency divider are implemented using 65nm CMOS technology for 60GHz wireless communication system. The mm-wave VCO was designed by NMOS cross-coupled LC type using current source. The architecture of the divide-by-4 high speed frequency divider is differential ILFD (Injection Locking Frequency Divider) with varactor to control frequency range. The frequency divider also uses current sources to get good phase noise characteristics. The measured results show that the VCO has 64.36~67.68GHz tuning range and the frequency divider divides the VCO output by 4 exactly. The high output power of 5.47~5.97dBm from the frequency divider is measured. The phase noise of the VCO including the frequency divider are -77.17dBc/Hz at 1MHz and -110.83dBc/Hz at 10MHz offset frequency. The power consumption including VCO is 38.4mW with 1.2V supply voltage.

Voltage Controlled Injection-Locked Oscillator Design at 2.4 GHz Band for Wideband Applications (광대역 응용을 위한 2.4 GHz 대역 전압 제어 주입 동기 발진기 설계)

  • Yoon, Won-Sang;Lee, Hun-Sung;Lee, Hee-Jong;Pyo, Seong-Min;Kim, Young-Sik;Han, Sang-Min
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.22 no.3
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    • pp.292-298
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    • 2011
  • In this paper, a voltage controlled injection-locked oscillator(VC-ILO) is proposed for wideband applications. From the control of the free-running frequency by a varactor diode, the wide frequency locking range can be obtained for low-level injected signals. The proposed VC-ILO is implemented on an FR-4 substrate with a thickness of 0.8 mm. The free-running frequencies of the oscillator is 2.39~2.52 GHz at the control voltage of 0~5 V. While the frequency locking range of over 50 MHz is presented for -10 dBm injected signal level at a fixed frequency, the locking range of over 90 MHz can be achieved for -30 dBm by controlling the free-running frequency.