• Title/Summary/Keyword: Voltage profile

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Coordinated Control of ULTC Considering the Optimal Operation Schedule of Capacitors (커패시터의 최적 스케줄링을 고려한 ULTC의 협조 제어)

  • Park, Jong-Young;Park, Jong-Keun;Nam, Soon-Ryul
    • The Transactions of the Korean Institute of Electrical Engineers A
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    • v.55 no.6
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    • pp.242-248
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    • 2006
  • This paper proposes a coordinated control method for under-load tap changers (ULTCs) with shunt capacitors to reduce the operation numbers of both devices. The proposed method consists of two stages. In the first stage, the dispatch schedule is determined using a genetic algorithm with forecasted loads to reduce the power loss and to improve the voltage profile during a day. In the second stage, each capacitor operates according to this dispatch schedule and the ULTCs are controlled in real time with the modified reference voltages considering the dispatch schedule of the capacitors. The performance of the method is evaluated for the modified IEEE 14-bus system. Simulation results show that the proposed method performs better than a conventional control method.

Voltage and Reactive Power Control By Using Genetic Algorithm (유전알고리즘을 이용한 전압/무효전력 제어)

  • Kim, Jong-Yul;Kim, Hak-Man;Kook, Kyung-Soo;Oh, Tae-Kyoo
    • Proceedings of the KIEE Conference
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    • 2002.07a
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    • pp.295-297
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    • 2002
  • In this study, Genetic Algorithm(GA) is applied for voltage and reactive power control in power system. In power system, switched shunt capacitors are used to improve the voltage profile and to reduce power losses. There are many switched shunt capacitors in power system. Therefore, it is necessary to coordinate these switched shunt capacitors. A Genetic Algorithm(GA) is used to find optimal coordination of switched shunt capacitors in power system. The effectiveness of the proposed approach is demonstrated in KEPCO's power system.

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Optimal Control of UPFC and Switched Shunt Capacitor by Using Genetic Algorithm (GA를 이용한 UPFC와 전력용 콘덴서의 최적 제어)

  • Kim, Hak-Man;Kim, Jong-Yul;Oh, Tae-Kyoo
    • Proceedings of the KIEE Conference
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    • 2003.07a
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    • pp.9-11
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    • 2003
  • In power system planing and operation, voltage and reactive power control are very important. The voltage deviation and system losses can be reduced through control of reactive power sources. In general, there are several different reactive power sources, we used UPFC and switched shunt capacitor to improve the voltage profile and to reduce system losses in this study. Since there are many switched shunt capacitors in power system, so it is necessary to coordinate these switched shunt capacitors. In this study, Genetic Algorithm(GA) is used to find optimal coordination of UPFC and switched shunt capacitors in a local area of power system. In case study, the effectiveness of the proposed method is demonstrated in KEPCO's power system. The simulation is performed by PSS/E.

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Unified Reliability and Its Cost Evaluation in Power Distribution Systems Considering the Voltage Magnitude Quality and Demand Varying Load Model (전압 크기의 품질 및 전력수요 변동모델을 고려한 배전계통의 통합적인 신뢰도 및 비용 평가)

  • Yun, Sang-Yun
    • The Transactions of the Korean Institute of Electrical Engineers A
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    • v.52 no.12
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    • pp.705-712
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    • 2003
  • In this paper, we propose new unified methodologies of reliability and its cost evaluation in power distribution systems. The unified method means that the proposed reliability approaches consider both conventional evaluation factor, i.e. sustained interruptions and additional ones, i.e. momentary interruptions and voltage sags. Because the three voltage quality phenomena generally originate from the outages on distribution systems, the basic and additional reliability indices are summarized considering the fault clearing mechanism. The proposed unified method is divided into the reliability evaluation for calculating the reliability indices and reliability cost evaluation for assessing the damage of customer. The analytic and probabilistic methodologies are presented for each unified reliability and its cost evaluation. The time sequential Monte Carlo technique is used for the probabilistic method. The proposed DVL(Demand Varying Load) model is added to the reliability cost evaluation substituting the average load model. The proposed methods are tested using the modified RBTS(Roy Billinton Test System) form and historical reliability data of KEPCO(Korea Electric Power Corporation) system. The daily load profile of the each customer type in domestic are gathered for the DVL model. Through the case studies, it is verified that the proposed methods can be effectively applied to the distribution systems for more detail reliability assessment than conventional approaches.

Dependence of Drain Induced Barrier Lowering for Doping Profile of Channel in Double Gate MOSFET (이중게이트 MOSFET에서 채널내 도핑분포에 대한 드레인유기장벽감소 의존성)

  • Jung, Hak-Kee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.15 no.9
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    • pp.2000-2006
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    • 2011
  • In this paper, the drain induced barrier lowering(DIBL) for doping distribution in the channel has been analyzed for double gate MOSFET(DGMOSFET). The DGMOSFET is extensively been studing because of adventages to be able to reduce the short channel effects(SCEs) to occur in convensional MOSFET. DIBL is SCE known as reduction of threshold voltage due to variation of energy band by high drain voltage. This DIBL has been analyzed for structural parameter and variation of channel doping profile for DGMOSFET. For this object, The analytical model of Poisson equation has been derived from Gaussian doping distribution for DGMOSFET. To verify potential and DIBL models based on this analytical Poisson's equation, the results have been compared with those of the numerical Poisson's equation, and DIBL for DGMOSFET has been investigated using this models.

Drain Induced Barrier Lowering of Asymmetric Double Gate MOSFET for Channel Doping Profile (비대칭 DGMOSFET의 도핑분포함수에 따른 DIBL)

  • Jung, Hakkee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.19 no.11
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    • pp.2643-2648
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    • 2015
  • This paper analyzes the phenomenon of drain induced barrier lowering(DIBL) for doping profiles in channel of asymmetric double gate(DG) MOSFET. The DIBL, the important short channel effect, is described as lowering of source barrier height by drain voltage. The analytical potential distribution is derived from Poisson's equation to analyze the DIBL, and the DIBL is observed according to the change of doping profile to influence on potential distribution. As a results, the DIBL is significantly influenced by projected range and standard projected deviation, the variables of channel doping profiles. The change of DIBL shows greatly in the range of high doping concentration such as $10^{18}/cm^3$. The DIBL increases with decrease of channel length and increase of channel thickness, and with increase of bottom gate voltage and top/bottom gate oxide film thickness.

Analysis of Threshold Voltage for Double Gate MOSFET of Symmetric and Asymmetric Oxide Structure (대칭 및 비대칭 산화막 구조의 이중게이트 MOSFET에 대한 문턱전압 분석)

  • Jung, Hakkee;Kwon, Ohshin;Jeong, Dongsoo
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2014.05a
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    • pp.755-758
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    • 2014
  • This paper has analyzed the change of threshold voltage for oxide structure of symmetric and asymmetric double gate(DG) MOSFET. The asymmetric DGMOSFET can be fabricated with different top and bottom gate oxide thickness, while the symmetric DGMOSFET has the same top and bottom gate oxide thickness. Therefore optimum threshold voltage is considered for top and bottom gate oxide thickness of asymmetric DGMOSFET, compared with the threshold voltage of symmetric DGMOSFET. To obtain the threshold voltage, the analytical potential distribution is derived from Possion's equation, and Gaussian distribution function is used as doping profile. We investigate for bottom gate voltage, channel length and thickness, and doping concentration how top and bottom gate oxide thickness influences on threshold voltage using this threshold voltage model. As a result, threshold voltage is greatly changed for oxide thickness, and we know the changing trend very differs with bottom gate voltage, channel length and thickness, and doping concentration.

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Optimal Capacitor Placement and Operation for Loss Minimzation and Improvement of Voltage Profile in Distribution System (배전계통의 손실감소 및 전압 보상을 위한 커패시터 최적 배치 및 운용)

  • 송현선
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.13 no.3
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    • pp.48-55
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    • 1999
  • Ths paper presents an optimization method which determines locations and size of capacitors simultaneously while minimizing power losses and improving voltage profile in radial distribution systems. Especially, the cost function associated with capacitor pla.cerrent is considered as step function due to banks of standard discrete capacities. Genetic algorithms(GA) are used to obtain efficiently the solution of the cost function associated with capacitors which is non-continuous and non-differentiable function. The strings in GA consist of the node nwnber index and size of capacitors to be installed. The length mutation operator, which is able to change the length of strings in each generation, is used. The proposed Jrethod which determines locations and size of capacitors simultaneously can reduce power losses and improve voltage proftle with capacitors of minimum size. Its efficiency is proved through the arolication in radial distribution systems.ystems.

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Voltage Dip Compensation Algorithm Using Multi-Level Inverter (멀티레벨 인버터의 순간정전 보상알고리즘에 관한 연구)

  • Yun, Hong-Min;Kim, Yong
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.27 no.12
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    • pp.133-140
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    • 2013
  • Cascaded H-Bridge multi-level inverters can be implemented through the series connection of single-phase modular power bridges. In recent years, multi-level inverters are becoming increasingly popular for high power applications due to its improved harmonic profile and increased power ratings. This paper presents a control method for balancing the dc-link voltage and ride-through enhancement, a modified pulse width-modulation Compensation algorithm of cascaded H-bridge multi-level inverters. During an under-voltage protection mechanism, causing the system to shut down within a few milliseconds after a power interruption in the main input sources. When a power interruption occurs finish, if the system is a large inertia restarting the load a long time is required. This paper suggests modifications in the control algorithm in order to improve the sag ride-through performance of ac inverter. The new proposed strategy recommends maintaining the DC-link voltage constant at the nominal value during a sag period, experimental results are presented.

Size Effects of the Catalyst on Characteristics of Zn/Air Batteries ($MnO_2$입자 크기에 따른 아연공기전지의 특성연구)

  • Kim, Jee-Hoon;Eom, Seung-Wook;Moon, Seong-In;Yun, Mun-Soo;Kim, Ju-Yong;Yug, Gyeong-Chang;Park, Jeong-Hoo
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2002.07b
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    • pp.1129-1131
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    • 2002
  • Zinc Air battery obtain their energy density advantage over the other batteries by utilizing ambient oxygen as the cathode materials, and reusing cathode as recycled form. And specific capacity of zinc powder is as high as 820mAh/g. When Zinc Air battery discharged by low rate current discharge voltage profile has very flat pattern until end of voltage. But, when Zinc Air battery discharged by high rate current discharge voltage and capacity become lower. Therefore, we focused on effects of catalyst size in cathode. So we examined performance of zinc air batteries, average discharge voltage, capacity, energy, resistance. And we also obtained resistance by the GSM pulse discharge. So we have got optimum size of catalyst for Zinc Air battery.

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