• Journal of Electrical Engineering and Technology
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• v.9 no.2
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• pp.576-588
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• 2014

The superiority of CMI (Cascaded Multilevel Inverter) is unparalleled in high power and high voltage STATCOM (Static Synchronous Compensator). However, the parameters and operating conditions of each individual power unit composing the cascaded STATCOM differ from unit to unit, causing unit voltage disequilibrium on the DC side. This phenomenon seriously impairs the operation performance of STATCOM, and thus maintaining the DC voltage balance and stability becomes critical for cascaded STATCOM. This paper analyzes the case of voltage disequilibrium, combines the operation characteristics of the cascaded STATCOM, and proposes a new DC voltage control scheme with the advantages of good control performance and stability. This hierarchical control method uses software to achieve the total active power control and also uses chopper controllers to enable that the imbalance power can flow among the capacitors in order to keep DC capacitor voltages balance. The operating principle of the chopper controllers is analyzed and the implementation is presented. The major advantages of the proposed control strategy are that the number of PI regulators has been decreased remarkably and accordingly the blindness of system design and debugging also reduces obviously. The simulation reveals that the proposed control scheme can achieve the satisfactory control goals.

• The Transactions of the Korean Institute of Power Electronics
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• v.22 no.2
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• pp.95-101
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• 2017

A simple and practical voltage balance method for a solid-state transformer (SST) is proposed to reduce the voltage difference of cascaded H-bridge converters. The tolerance device components in SST cause the imbalance problem of DC-link voltage in the H-bridge converter. The Max/Min algorithms of voltage balance controller are merged in the controller of an AC/DC rectifier to reduce the voltage difference. The DC-link voltage through each H-bridge converter can be balanced with the proposed control methods. The design and performance of the proposed SST are verified by experimental results using a 30 kW prototype.

• Journal of Power Electronics
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• v.18 no.6
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• pp.1830-1843
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• 2018

In this paper, the generation of a reference current and voltage signal based on a Kalman filter is offered for a 3-phase 4wire UPQC (Unified Power Quality Conditioner). The performance of the UPQC is improved with source voltages that are distorted due to harmonic components. Despite harmonic and frequency variations, the Kalman filter is capable enough to determine the amplitude and the phase angle of load currents and source voltages. The calculation of the first state is sufficient to identify the fundamental components of the current, voltage and angle. Therefore, the Kalman state estimator is fast and simple. A Kalman based control strategy is proposed and implemented for a UPQC in a distribution system. The performance of the proposed control strategy is assessed for all possible source conditions with varying nonlinear and linear loads. The functioning of the proposed control algorithm with a UPQC is scrutinized and validated through simulations employing MATLAB/Simulink software. Using a FPGA SPATRAN 3A DSP board, the proposed algorithm is developed and implemented. A small-scale laboratory prototype is built to verify the simulation results. The stated control scheme for the UPQC reduces the following issues, voltage sags, voltage swells, harmonic distortions (voltage and current), unbalanced supply voltage and unbalanced power factor under dynamic and steady-state operating conditions.

• Journal of the Korean Institute of Telematics and Electronics
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• v.24 no.4
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• pp.701-707
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• 1987

This paper is concerned with an accurate delay time modling of the ED MOS logic gates and its application to the multiple delay logic simulator. The proposed delay model of the ED MOS logic gate takes account of the effects of not only the loading conditions but also the slope of the input waveform. Defining delay as the time spent by the current imbalance of the active inverter to charge and discharge the output load, with respect to physical reference levels, rise and fall model delay times are obtained in an explicit formulation, using optimally weighted imbalance currents at the end points of the voltage transition. A logic simulator which uses multiple rise/fall delays based on the model as decribed in the above has been developed. The new delay model and timing verification method are evaluated with repect to delay accuracy and execution time.

• Journal of Power Electronics
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• v.17 no.5
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• pp.1317-1326
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• 2017

The cascaded H-bridge (CHB) multilevel converter is a promising topology for large-scale photovoltaic (PV) systems. The output voltage over-modulation derived by the inter-module active power imbalance is one of the key issues for CHB PV systems. This paper proposed a dynamic power distribution strategy to eliminate the over-modulation in a CHB PV system by suitably redistributing the reactive power among the inverter modules of the CHB PV system. The proposed strategy can effectively extend the operating region of the CHB PV system with a simple control algorithm and easy implementation. Simulation and experimental results carried out on a seven-level CHB grid-connected PV system are shown to validate the proposed strategy.

• Journal of the Korean Society of Industry Convergence
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• v.20 no.2
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• pp.115-124
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• 2017

This paper aims to develop an SMPS topology for handling a high range of input voltages based on a DC-DC flyback converter circuit. For this purpose, 2 capacitors of the same specifications were serially connected on the input terminal side, with a flyback converter of the same circuit configuration serially connected to each of them, so as to achieve high input voltage and an effect of dividing input voltage. The serially connected flyback converters have the transformer turn ratio of 1:1, so that each coil is used for the winding of a single transformer, which is a characteristic of doubly-fed configuration and enables the correction of input capacitor voltage imbalance. In addition, a pulse transformer was designed and fabricated in a way that can achieve the isolation and noise robustness of the PWM output signal of the PWM controller that applies gate voltage to individual flyback converter switches. PSIM simulation was carried out to verify such a structure and confirm its feasibility, and a 100W class stack was fabricated and used to verify the feasibility of the proposed high voltage SMPS topology.

• Journal of Power Electronics
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• v.5 no.3
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• pp.224-232
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• 2005

A new three phase three-level Pulse Width Modulation (PWM) Switched Voltage Source (SVS) inverter with zero neutral point potential is proposed. It consists of three single-phase inverter modules. Each module is composed of a switched voltage source and inverter switches. The major advantage is that the peak value of the phase output voltage is twice as high as that of a conventional neutral-point-clamped (NPC) PWM inverter. Thus, the proposed inverter is suitable for applications with low voltage sources such as batteries, fuel cells, or solar cells. Furthermore, three-level waveforms of the proposed inverter can be achieved without the switch voltage imbalance problem. Since the average neutral point potential of the proposed inverter is zero, a common ground between the input stage and the output stage is possible. Therefore, it can be applied to a transformer-less Power Conditioning System (PCS). The proposed inverter is verified by a PSpice simulation and experimental results based on a laboratory prototype.

• Journal of Power Electronics
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• v.19 no.1
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• pp.234-243
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• 2019

Studying the control strategy of a microgrid under the load unbalanced state helps to improve the stability of the system. The magnitude of the power fluctuation, which occurs between the power supply and the load, is generated in a microgrid under the load unbalanced state is called negative sequence reactive power $Q^-$. Traditional power distribution methods such as P-f, Q-E droop control can only distribute power with positive sequence current information. However, they have no effect on $Q^-$ with negative sequence current information. In this paper, a stationary-frame control method for power sharing and voltage unbalance compensation in islanded microgrids is proposed. This method is based on the proper output impedance control of distributed generation unit (DG unit) interface converters. The control system of a DG unit mainly consists of an active-power-frequency and reactive-power-voltage droop controller, an output impedance controller, and voltage and current controllers. The proposed method allows for the sharing of imbalance current among the DG unit and it can compensate voltage unbalance at the same time. The design approach of the control system is discussed in detail. Simulation and experimental results are presented. These results demonstrate that the proposed method is effective in the compensation of voltage unbalance and the power distribution.

• ETRI Journal
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• v.36 no.5
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• pp.829-834
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• 2014

In this paper, a lateral power metal-oxide-semiconductor field-effect transistor with ultra-low specific on-resistance is proposed to be applied to a high-voltage (up to 200 V) integrated chip. The proposed structure has two characteristics. Firstly, a high level of drift doping concentration can be kept because a tilt-implanted p-drift layer assists in the full depletion of the n-drift region. Secondly, charge imbalance is avoided by an extended trench gate, which suppresses the trench corner effect occurring in the n-drift region and helps achieve a high breakdown voltage (BV). Compared to a conventional trench gate, the simulation result shows a 37.5% decrease in $R_{on.sp}$ and a 16% improvement in BV.

• Proceedings of the KIEE Conference
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• 1998.07f
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• pp.1966-1968
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• 1998

This paper describes a gate drive circuit for series connected IGBTs in high voltage applications. The proposed control criterion of the gate circuit is to actively limit the voltages during switching transients, while minimizing switching transient and losses. In order to achieve the control criterion, an analog closed loop control scheme is adopted. The performance of gate drive circuit is examined experimentally by the series connection of three IGBTs with conventional snubber circuits. The experimental results show the voltage balancing by an active control under wide variation in loads and imbalance conditions.