• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.22 no.3
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• pp.8-14
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• 2008

This paper studies a more exact flicker evaluation method by detecting power quality disturbances and excluding the effects of power quality disturbances. Up to the present, power quality disturbances affect flicker evaluation index because power quality problems do not have been considered. However, flick index should represent only flicker without power quality disturbances. Thus, in this paper, we present the improved flicker evaluation method which removing the effects of power quality disturbances such as voltage sag and transient caused by fault and inverter/breaker switching. We detect voltage sag and transient using wavelet transform and remove the effects of power quality disturbances from flicker index.

• Proceedings of the KIEE Conference
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• 1997.07f
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• pp.2047-2049
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• 1997

Computers and automatic equipment are very sensitive to the disturbances such as voltage transients, voltage sag, and harmonics. These disturbances cause them to have a malfunction or fault which brings about damages and losses. UPS (uninterruptible power supply) and SPS(stand-by power supply) have been used to provide the required voltage in a critical load without disturbances. However, UPS has appreciable losses due to the operation of the inverter in full rated power at all times. SPS, although whose inverter losses are smaller than those of UPS, transfers disturbances with a short duration to the load, due to the limited reaction time. In this research, a dynamic voltage compensator, which can make up for the weakness of UPS and SPS, is proposed. The operation of the proposed system was verified by a computer simulation. A hardware scaled-model was fabricated and tested to conform the feasibility of the actual system development.

• Journal of Electrical Engineering and Technology
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• v.8 no.3
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• pp.544-558
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• 2013

This paper proposes a simplified and efficient control scheme for Unified Power Quality Conditioner (UPQC) based on three-level (NPC) inverter capable to mitigate source current harmonics and compensate all voltage disturbances perturbations such us, voltage sags, swells, unbalances and harmonics. The UPQC is designed by the integration of series and shunt active filters (AFs) sharing a common dc bus capacitor. The dc voltage is maintained constant using proportional integral voltage controller. The shunt and series AF are designed using a three-phase three-level (NPC) inverter. The synchronous reference frame (SRF) theory is used to get the reference signals for shunt and the power reactive theory (PQ) for a series APFs. The reference signals for the shunt and series APF are derived from the control algorithm and sensed signals are injected in tow controllers to generate switching signals for series and shunt APFs. The performance of proposed UPQC system is evaluated in terms of power factor correction and mitigation of voltage, current harmonics and all voltage disturbances compensation in three-phase, three-wire power system using MATLAB-Simulink software and SimPowerSystem Toolbox. The simulation results demonstrate that the proposed UPQC system can improve the power quality at the common connection point of the non-linear load.

• The Transactions of the Korean Institute of Power Electronics
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• v.5 no.6
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• pp.584-591
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• 2000

Power Quality Compensator(PQC) has been installed to protect the sensitive loads against the voltage disturbances, such as voltage sag and interruption. In general, static switch is used for the purpose of link between utility and PQC. So transfer operation of the static switch play a important part in the PQC. Many studies on the structure and control of PQC have been progressed in active, but these researches have been rarely mentioned about any voltage-disturbances-detection method to start the PQC operation. In this paper, a new voltage-disturbances-detection algorithm for computer application loads using the CBEMA/ITIC curve is proposed for transfer operation of the static switch. The proposed detection algorithm is implemented to get fast detecting time through the comparison of instantaneous 3-phase voltage values transferred to DC values in the synchronous reference frame with the operating reference values. To get the robust characteristics against the noise, a first order digital filter is designed. The magnitude falling and phase delay caused by the filter are compensated through the error normalizing and numerical analysis using transfer function, respectively. Finally, the validity of the proposed algorithm is proved by ACSL simulation and experimental results.

• Proceedings of the KIEE Conference
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• 2007.10a
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• pp.67-69
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• 2007

PMSM (Permanent Magnet Synchronous Motor) current control is a most inner loop of electromechanical driving systems and it plays a foundation role in the hierarchy's control loop of several mechanical machine systems. In this paper, a simple RMRAC control scheme for the PMSM is proposed in the synchronous frame. In the synchronous current model, the input signal is composed of as a calculated voltage by adaptive laws and system disturbances. The gains of feed-forward and feed-back controller are estimated by the proposed e-modification methods respectively, where the disturbances are assumed as filtered current tracking errors. After the estimation of the disturbances from the tracking errors, the corresponding voltage is fed forward to control input to compensate for the disturbances. The proposed method is robust to high frequency disturbances and has a fast dynamic response to time varying reference current trajectory. It also shows a good real-time performance duo to it's simplicity of control structure. Through the simulations considering several cases of external disturbances and experimental results, efficiency of the proposed method is verified

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.58 no.2
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• pp.101-107
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• 2009

This paper deal with development of on-line type voltage sag compensation system using supercapacitor EDLC to solve the voltage sag problems which are considered to be dominant disturbances affecting the power quality. With the wide use of semiconductor devices in electrical equipment, modem-type loads are becoming increasingly sensitive to the voltage sags and the disturbances prove to be costly to industries. Supercapacitor EDLC is employed to compensate dynamically for the voltage sag of system with sensitive loads. This capacitor has higher energy density than the electrolytic capacitor. Also, this capacitor has a lot of advantage such as no maintenance, longer life cycle and faster charge-discharge time than the battery system. Therefore, in this paper, the energy design scheme of supercapacitor and the configuration technique of on-line type voltage sag compensation systems are newly introduced. According to the results of experimental of prototype 5[kVA] system, it is verified that the developed system has effectiveness of voltage sag compensation by using a supercapacitor EDLC.

• Proceedings of the KIEE Conference
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• 2007.07a
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• pp.1099-1101
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• 2007

In this paper, a study has been performed for development of dynamic voltage restorer(DVR) system using EDLC (Electric Double Layer Capacitor) to solve voltage sags which are considered the dominant disturbances affecting power quality. With the prolific use of semiconductor devices in electrical equipment, modern-day loads are becoming increasingly sensitive to the sags and the disturbances prove to be costly to industries. As a technology-driven custom power installation, the Dynamic Voltage Restorer (DVR) is recognized to be most effective equipment that can be used to counter the voltage sag problem. Hence, this paper proposes the high-performance optimal design of On-Line type DVR system which can efficiently compensate the instantaneous voltage sag and instantaneous interruption of the utility voltage source.

• The Transactions of the Korean Institute of Electrical Engineers A
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• v.49 no.1
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• pp.6-12
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• 2000

This paper presents various processes of dynamic voltage collapse which is initiated by various power system disturbances, and the impacts of dynamic voltage controllers. According to the analysis results, the composition of induction motors with short time constants affects the voltage collapse strongly. Also, it is proved that the addition of fast acting reactive compensation devices, such as SVC, at high reactive loss sensitivity($$\delta$$Q$$_luss/\delta$$P$$_L$$) buses could be one of the best countermeasure to escape the voltage collapse.

• IEIE Transactions on Smart Processing and Computing
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• v.4 no.5
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• pp.330-339
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• 2015

Power quality (PQ) problems are becoming a big issue, since delicate complex electronic devices are widely used. We present a new denoising technique using discrete wavelet transform (DWT), where a modified correlation thresholding is used in order to reliably detect the PQ disturbances. We consider various PQ disturbances on the basis of IEEE-1159 standard over noisy environments, including voltage swell, voltage sag, transient, harmonics, interrupt, and their combinations. These event signals are decomposed using DWT for the detection of disturbances. We then evaluate the PQ disturbance detection ratio of the proposed denoising scheme over Gaussian noise channels. Simulation results also show that the proposed scheme has an improved signal-to-noise ratio (SNR) over existing scheme.

• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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• 2005.05a
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• pp.391-393
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• 2005

This paper studies flicker evaluation considering power quality disturbance. A flicker problem with light device irritates human's eyes. Also, the flicker problem has an influence on adverse effect such as rolling device and rotating device. However, a study of flicker evaluation is not complete. A flicker is measured and evaluated at monitoring point. But we consider power quality disturbances such as voltage sag and transient that cause fault and inverter/breaker switching. Power quality disturbances affects flicker evaluation. A flicker evaluation index increases. Therefore, we consider power quality disturbances. We detect voltage sag and transient using wavelet and evaluate flicker without flicker index including power quality disturbances.