• Journal of Power Electronics
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• v.9 no.4
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• pp.593-603
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• 2009

This paper proposes and describes the design and operational principles of a three-phase three-level nine switch voltage source inverter. The proposed topology consists of three bi-directional switches inserted between the source and the full-bridge power switches of the classical three-phase inverter. As a result, a three-level output voltage waveform and a significant suppression of load harmonics contents are obtained at the inverter output. The harmonics content of the proposed multilevel inverter can be reduced by half compared with two-level inverters. A Fourier analysis of the output waveform is performed and the design is optimized to obtain the minimum total harmonic distortion. The full-bridge power switches of the classical three-phase inverter operate at the line frequency of 50Hz, while the auxiliary circuit switches operate at twice the line frequency. To validate the proposed topology, both simulation and analysis have been performed. In addition, a prototype has been designed, implemented and tested. Selected simulation and experimental results have been provided.

• Proceedings of the KIEE Conference
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• 2000.07b
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• pp.1218-1220
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• 2000

A new control technique is proposed to reduce the distortion of UPS output voltage. The Load of UPS is rectifier which has many harmonics on its output current in many cases. The distortion of output voltage by the harmonics is repeated at the same position in one cycle. Therefore we can assume that the next cycle wave form would be similar to the previous one. The repeated error can be estimated and be compensated by the Multi controller at every sampling times.

• Transactions of the Korean Society of Automotive Engineers
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• v.18 no.6
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• pp.23-30
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• 2010

A detailed circuit level model requires a small sampling time to represent high frequency switching behaviors with proper resolution. The small sampling time leads a large execution time to obtain the system analysis results. As the alternative of the detailed circuit model, an averaged PWM switch model was proposed for the rapid system level analysis. There exists a voltage distortion between the reference and output voltage because of non-ideal switching characteristics, such as the dead-time, diode forward voltage drop and conduction resistance. This paper analyzed causes and effects of the voltage distortion. The average inverter model, which reflecting this voltage distortion, is developed for the rapid and accurate analysis of automotive electric drive system in MATLAB/Simulink environment. The rapidity and accuracy of the proposed inverter model is proved through comparison between simulation and experiment.

• Journal of international Conference on Electrical Machines and Systems
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• v.1 no.4
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• pp.448-456
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• 2012

This paper presents a multilevel inverter configuration which is designed by insertion of a bidirectional switch between capacitive voltage sources and a conventional H-bridge module. The modified inverter can produce a better sinusoidal waveform by increasing the number of output voltage levels. By serial connection of two modified H-bridge modules, it is possible to produce 9 output voltage levels including zero. There are 24 basic switching patterns with the 9 output voltage levels. Among the patterns, we select the 2 most efficient switching patterns to get a lower switching loss and minimum dv/dt stress. We then analyze characteristics of Total Harmonic Distortion (THD) of the output voltage with variation of input voltage by computer-aided simulations and experiments.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.64 no.9
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• pp.1297-1305
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• 2015

This paper proposes a power feedforward technique for the performance improvement of DC-link voltage control in the dynamic voltage restorer (DVR). The DC-link Voltage is able to be unstable for an instant owing to any change in the load and voltage sag. The distortion of the DC-link voltage leads to the negative influence on the performance of DVR. To mitigate the distortion of the DC-link voltage, the power feedforward component is calculated by the load power and the grid voltage, and then it is added to the reference current of the conventional DC-link voltage controller. By including output power feedforward component on the DC-link controller, the DC-link voltage can settle down more quickly than when the conventional DC-link voltage controller applied. The proposed technique was validated through the simulation and experimental results.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.21 no.5
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• pp.1325-1331
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• 1996

In this paper, a new current-memory circuit is proposed that reduces the clock feedthrough(CFT) error voltage causing total harmonic distortion(THD) increment in switched-current(SI) systems. Using PMOS transistor in CMOS complementary, the proposed one reduces output distortion current due to the CFT errorvoltage. A proposed current-memory is designed using a 1.2.mu.m CMOS process anda 1MHz sinusoidal signal having a 68.mu.A amplitude current is applied as input (sampling frequency:20MHz). It hasbeen shown from the simulation that the output distortion current effected by the CFT error voltage is reduced by approximately 10 times the error voltage of conventional one, THD is -57dB in case ofappling 1kHz frequency input signalwith 0.5 peak signal-to-bias current ratio.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.19 no.4
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• pp.62-70
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• 2005

This paper presents the actual conditions and reform measures of voltage and current harmonics being made in low-voltage power systems supplying various loads. The measurements were carried out at the secondary output terminals of 22.9[kV]/380[V]220[V] customer's transformers, and the results were discussed on the basis of the comparison with IEEE and IEC harmonics control standards. The voltage THDs of the power systems employed in this survey were less than $5[\%]$ that is considered to be acceptable. On the contrary, the current distortions were significantly greater than the voltage distortions, and the current THDs were distributed over the wide-range from 15.7 to $60.4[\%]$. In particular, the current distortion on the low voltage power lines of office buildings in which many PC and fluorescent lamps are used is remarkably more serious than that of factory facilities. As a result, the voltage distortion factors are observed within the range of its allowable level or less than the limits, but the current distortion factors are significantly greater than the limits of IEEE and IEC standards.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.64 no.2
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• pp.79-84
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• 2015

Voltage sags are considered the dominant disturbances affecting power quality. Dynamic voltage restorers(DVRs) are mainly used to protect sensitive loads from the electrical network voltage disturbances such as sags or swells and could be used to reduce harmonic distortion of ac voltages. The typical DVR topology essentially contains a PWM inverter with LC Filter, an injection transformer connected between the ac voltage line and the sensitive load, and a DC energy storage device. For injecting series voltage, the PWM inverter is used and the passive filter consist of inductor(L) and capacitor(C) for harmonics elimination of the inverter. However there are voltage pulsation responses by the characteristic of the LC passive filter that eliminate the harmonics of the PWM output waveform of the inverter. Therefore, this paper presented design and feedback performance of LC filter used in the DVRs. The voltage control by LC filter should be connected in the line side since this feedback method allows a relatively faster dynamic response, enabling the elimination of voltage notches or spikes in the beginning and in the end of sags and strong load voltage THD reduction. Illustrative examples are also included.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.62 no.11
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• pp.1560-1565
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• 2013

This paper proposes the control method for compensating for unbalanced grid current and reducing a total harmonic distortion (THD) of the grid current at the three-phase grid-connected inverter systems under unbalancd and distorted grid voltage conditions. The THD of the grid current caused by grid voltage harmonics is derived by considering the phase delay and magnitude attenuation due to the hardware low-pass filter (LPF). The Cauchy-Schwarz inequality theory is used in order to search more easily for a minimum point of THD. Both the gain and angle of a compensation voltage at the minimum point of THD of the grid current are derived. The negative-sequence components in the three-phase unbalanced grid voltage are cancelled in order to achieve the balanced grid current. The simulation and experimental results show the validity of the proposed control methods.

• The Transactions of the Korean Institute of Electrical Engineers A
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• v.53 no.7
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• pp.389-396
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• 2004

This paper introduces a new algorithm to calculate distortion power using complex THD(Total Harmonic Distortion) index. The proposed algorithm involves FFT(Fast Fourier Transform) to compute real and imaginary THDs of voltage and current. Case studies are presented to show the availability of the proposed method.