• Transactions on Electrical and Electronic Materials
• /
• 제7권3호
• /
• pp.99-102
• /
• 2006

The electrical characteristics of CMOS inverter with LDMOSFET are studied for high power and digital circuit application by using two dimensional MEDICI simulator. The simulation is done in terms of voltage transfer characteristic and on-off switching properties of CMOS inverter with variation of channel length and channel doping levels. The channel which surrounds a junction-type source in LDMOSFET is considered to be an important parameter to decide a circuit operation of CMOS inverter. The digital logic levels of input voltage show to increase with increase of n-channel length and doping levels while the logic output levels show to the almost constant.

• Journal of Power Electronics
• /
• 제15권5호
• /
• pp.1235-1243
• /
• 2015

This paper presents a modified Space Vector Pulse Width Modulation Technique (SVPWM), which solves the well-known problem of voltage imbalance in the capacitors of a single-phase multilevel inverter. The proposed solution is based on the measurement of DC voltage levels at each capacitor of the inverter DC bus. The measurements are then used to adjust the size of the active vectors within the SVPWM algorithm to keep the voltage waveform sinusoidal regardless of any voltage imbalance on the DC link capacitors. When a voltage deviation exceeds a predetermined hysteresis band, the correspondent voltage vector is restricted to restore the voltage level to an acceptable threshold. Hence, the need for external voltage regulators for the voltage capacitors is eliminated. The functionality of the proposed algorithm is successfully demonstrated through simulations and experiments on a grid tied application.

• JSTS:Journal of Semiconductor Technology and Science
• /
• 제15권6호
• /
• pp.664-670
• /
• 2015

A four-times-VDD switch that supports high and low voltage mode operations is demonstrated in a generic 65 nm logic process. The proposed switch shows the robust operation for supply voltages ranging from VDD to $4{\times}VDD$. A cascaded voltage switch and a voltage doubler based charge pump generate the intermediate supply voltage levels required for the proposed high voltage switch. All the high voltage circuits developed in this work can be implemented using standard logic transistors without being subject to any voltage overstress.

• Journal of Power Electronics
• /
• 제18권4호
• /
• pp.1051-1066
• /
• 2018

This study presents a novel step-up switched capacitor multilevel inverter (SCMLI) structure. The proposed structure comprises 2 unequal DC voltage sources, 4 capacitors, and 14 unidirectional power switches. It can synthesize 21 output voltage levels. The important features of the proposed topology are its self-voltage boosting and inherent capacitor voltage balancing capabilities. Furthermore, a cascaded structure of the proposed SCMLI with an asymmetric DC voltage source configuration is presented. The proposed topology and its cascaded structure are compared with conventional and other recently developed topologies in terms of different aspects, such as the required components to produce a specific number of output voltage levels, the total standing voltage (TSV) and peak inverse voltage of the structure, and the maximum number of switches in the conducting path. Furthermore, a cost function is developed to verify the cost-effectiveness of the proposed topology with respect to other topologies. The TSV of the proposed topology is significantly lower than those of other topologies. Moreover, the developed topology is cost-effective compared with other topologies. A detailed operating principle, power loss analysis, and selection procedure for switched capacitors are presented for the proposed SCMLI structure. Extensive simulation and experimental studies of a 21-level inverter structure prove the effectiveness and merits of the proposed SCMLI.

• Journal of Power Electronics
• /
• 제17권1호
• /
• pp.136-148
• /
• 2017

In recent years, voltage source multilevel converters are very popular in medium/high-voltage industrial applications, among which the NPC/H-Bridge converter is a popular solution to the medium/high-voltage drive systems. The conventional finite control set model predictive control (FCS-MPC) strategy is not practical for multilevel converters due to their substantial calculation requirements, especially under high number of voltage levels. To solve this problem, a hierarchical model predictive voltage control (HMPVC) strategy with referring to the implementation of g-h coordinate space vector modulation (SVM) is proposed. By the hierarchical structure of different cost functions, load currents can be controlled well and common mode voltage can be maintained at low values. The proposed strategy could be easily expanded to the systems with high number of voltage levels while the amount of required calculation is significantly reduced and the advantages of the conventional FCS-MPC strategy are reserved. In addition, a HMPVC-based field oriented control scheme is applied to a drive system with the NPC/H-Bridge converter. Both steady-state and transient performances are evaluated by simulations and experiments with a down-scaled NPC/H-Bridge converter prototype under various conditions, which validate the proposed HMPVC strategy.

• 전기학회논문지
• /
• 제67권2호
• /
• pp.209-215
• /
• 2018

This paper present a 7-level PWM inverter adopting voltage balancing control to series-connected input capacitors. The prior proposed 7-level PWM inverter consists of dc input source, three series-connected capacitors, two bidirectional switch modules, and an H-bridge. This circuit topology is useful to increase the number of output voltage levels, however it fails to generate 7-level in output voltage without consideration for voltage balancing among series-connected capacitors. Capacitor voltage imbalance is caused on the different period between charging and discharging of capacitor. To solve this problem, we uses the amplitude modulation of carrier wave, which is used to produce the center output voltage level. To verify the validity of the proposed control method, we carried out computer-aided simulation and experiments using a prototype.

• Journal of Electrical Engineering and Technology
• /
• 제2권1호
• /
• pp.35-41
• /
• 2007

This paper presents the results of investigating harmonic levels on medium voltage motors at loading conditions in air separation plant. The essential results of the measurements of the medium voltage motor harmonics are summarized in the values for the total harmonic distortion (THD). Motors loading case is used to assess the current and voltage harmonic distortions. Proper system analysis is important when adding a new motor starting and controlling the equipment. With the result of the paper it is possible to suggest the most appropriate starting and control method. Two medium voltage motors of air separation unit measurement results and simulations are summarized. Both current and voltage harmonic distortions are fitted by using a linear and exponential regression model. The prediction of THD values can be used for this kind of process for future planning by utilities.

• 한국전기전자재료학회논문지
• /
• 제18권8호
• /
• pp.685-689
• /
• 2005

In the fabrication and design of MLCCs (Multilayer Ceramic Capacitors) with Ni inner electrode for medium and high voltage, reliability and dielectric breakdown mode have been investigated. For thickness of green sheet, the relationship between the rated voltage versus the thickness of green sheet. Increasing the thickness of green sheet increases the dielectric breakdown voltage. However, a practical limit to this linear relationship occurs at 30 urn and above. As the thickness of green sheet increased, dielectric breakdown voltage and weibull coefficient is increased, but abruptly decrease at 30 urn and 36 urn. When 24 urn of green sheet thickness, weibull coefficient and dielectric breakdown voltage were 13.58 and 70 V/um respectively. The results enabling the MLCCs to demonstrate high levels of reliability at medium and high voltage.

• 조명전기설비학회논문지
• /
• 제25권4호
• /
• pp.38-44
• /
• 2011

Grounding electrodes with higher burial depths are evaluated to have better performance, due to the domestic practice that puts the grounding resistance as the standard of performance evaluation, while grounding resistance decreases as the burial depth increases. However, The dangerous voltage is necessary for the analysis. Because the performance evaluation of grounding electrodes should include not only grounding resistance but also the dangerous voltage(mesh voltage and step voltage). So in this paper, The dangerous voltages of mesh grounding and rod grounding were analyzed for using computer simulation and miniature grounding model.

• Journal of Power Electronics
• /
• 제10권3호
• /
• pp.251-261
• /
• 2010

The general function of a multilevel converter is to synthesize a desired output voltage from several levels of dc voltages as inputs. In order to increase the steps in the output voltage, a new topology is recommended in [1], which benefits from a series connection of sub-multilevel converters. In the procedure described in this reference, despite all the advantages, it is not possible to produce all the steps (odd and even) in the output. In addition, for producing an output voltage with a constant number of steps, there are different configurations with a different number of components. In this paper, the optimal structures for this topology are investigated for various objectives such as minimum number of switches and dc voltage sources and minimum standing voltage on the switches for producing the maximum output voltage steps. Two new algorithms for determining the dc voltage sources magnitudes have been proposed. Finally, in order to verify the theoretical issues, simulation and experimental results for a 49-level converter with a maximum output voltage of 200V are presented.