• 대한전기학회논문지:전기기기및에너지변환시스템부문B
• /
• 제54권5호
• /
• pp.231-237
• /
• 2005

Many conventional multi-level inverters have detected switching faults by using the over voltage and current. However, fault detection of the switching elements is very difficult because the voltage and current due to each switching fault decrease more than the normal operation. Moreover, the dc-link unbalancing voltage causes a serious problem in the safety and reliability of system when the 3-level inverter faults occur Therefore, this paper proposes the simple fault diagnose method and the neutral-point-voltage control method that can protect the 3-level inverter system from the unbalancing voltage of the do-link capacitors when the faults of switching elements occur in the 3-level inverter that is very efficient in ac motor drives of the high voltage and high power applications. Through experiment results, the validity of the proposed method is demonstrated.

• Journal of international Conference on Electrical Machines and Systems
• /
• 제2권2호
• /
• pp.179-183
• /
• 2013

This paper report on experimental results of 5-level inverter by DC divided link voltage. We have alreday reported that DC divided link valtage comes to be able to reduse harmonic of out line voltage. So we tested whether DC divided link voltage can reduce harmonics in experimental setup. This paper shows simulation results and experimental results. And we confirmed that DC divided link voltage can also apply in experimental setup.

• Journal of Power Electronics
• /
• 제17권1호
• /
• pp.96-105
• /
• 2017

In this paper, a hybrid modular multilevel converter (MMC) topology with an improved nearest level modulation method is proposed for medium-voltage high-power applications. The arm of the proposed topology contains N series connected half-bridge submodules (HBSMs), one full-bridge submodule (FBSM) and an inductor. By exploiting the FBSM, half-level voltages are obtained in the arm voltages. Therefore, an output voltage with a 2N+1 level number can be generated. Moreover, the total level number of the inserted submodules (SMs) is a constant. Thus, there is no pulse voltage across the arm inductors, and the SM capacitor voltage is rated. With the proposed voltage balancing method, the capacitor voltage of the HBSM is twice the voltage of the FBSM, and each IGBT of the FBSM has a relatively low switching frequency and an equalized conduction loss. The capacitor voltage balancing methods of the two kinds of SMs are implemented independently. As a result, the switching frequency of the HBSM is not increased compared to the conventional MMC. In addition, according to a theoretical calculation of the total harmonic distortion of the electromotive force (EMF), the voltage quality with the presented method can be significantly enhanced when the SM number is relatively small. Simulation and experimental results obtained with a MMC-based inverter verify the validity of the developed method.

• 전기학회논문지
• /
• 제67권2호
• /
• pp.209-215
• /
• 2018

This paper present a 7-level PWM inverter adopting voltage balancing control to series-connected input capacitors. The prior proposed 7-level PWM inverter consists of dc input source, three series-connected capacitors, two bidirectional switch modules, and an H-bridge. This circuit topology is useful to increase the number of output voltage levels, however it fails to generate 7-level in output voltage without consideration for voltage balancing among series-connected capacitors. Capacitor voltage imbalance is caused on the different period between charging and discharging of capacitor. To solve this problem, we uses the amplitude modulation of carrier wave, which is used to produce the center output voltage level. To verify the validity of the proposed control method, we carried out computer-aided simulation and experiments using a prototype.

• Journal of Electrical Engineering and information Science
• /
• 제1권2호
• /
• pp.109-118
• /
• 1996

This paper deals with a new multi-level high voltage source inverter with GTO Thyristors. Recently, a multi-level approach seems to be the best suited for implementing high voltage conversion systems because it leads to harmonic reduction and deals with safe high power conversion systems independent of the dynamic switching characteristics of each power semiconductor device. A conventional multi-level inverter has some problems; voltage unbalance between DC-link capacitors and larger blocking voltage across the inner switching devices. To solve these problems, the novel multi-level inverter structure is proposed.

• Journal of Power Electronics
• /
• 제16권2호
• /
• pp.447-454
• /
• 2016

A single-ended primary-inductor converter (SEPIC) features low input current ripple and output voltage up/down capability. However, the switching devices in a two-level SEPIC suffer from high voltage stresses and switching losses. To cope with this drawback, this study proposes a three-level SEPIC that uses a low voltage-rated switch and thus achieves better switching performance compared with the two-level SEPIC. The three-level SEPIC can reduce switch voltage stresses and switching losses. The converter operation and control method are described in this work. The experimental results for a 500 W prototype converter are also discussed. Experimental results show that unlike the two-level SEPIC, the three-level SEPIC achieves improved power efficiency with balanced capacitor voltages.

• 전력전자학회논문지
• /
• 제22권4호
• /
• pp.285-296
• /
• 2017

This paper proposes an improved modulation scheme for the medium voltage modular multi-level converter (MMC), which operates in the nearest level control and applies in the medium voltage direct current (MVDC) system. In the proposed modulation scheme, the offset (neutral-to-zero output) voltage is adjusted, with the phase voltage magnitude, thereby maintaining a constant value with N+1 level in the controllable modulation index (MI) range. In order to confirm the proposed scheme's validity, computer simulations for the 22.9 kV - 25 MVA MMC were performed with PSCAD/EMTDC, as well as hardware experiments for the 380 V - 10 kVA MMC. The proposed modulation scheme offers to build a constant pole voltage regardless of the MI value, and to build a phase voltage with improved total harmonic distortion (THD).

• Journal of Electrical Engineering and Technology
• /
• 제11권1호
• /
• pp.125-134
• /
• 2016

We propose an efficient high voltage level shifter for a high side Buck converter driving a light-emitting diode (LED) lamp. The proposed circuit is comprised of a low voltage pulse width modulation (PWM) signal driver, a coupling capacitor, a resistor, and a diode. The proposed method uses a property of a PWM signal. The property is that the signal repeatedly transits between a low and high level at a certain frequency. A low voltage PWM signal is boosted to a high voltage PWM signal through a coupling capacitor using the property of the PWM signal, and the boosted high voltage PWM signal drives a p-channel metal oxide semiconductor (PMOS) transistor on the high side Buck converter. Experimental results show that the proposed level shifter boosts a low voltage (0 to 20 V) PWM signal at 125 kHz to a high voltage (370 to 380 V) PWM signal with a duty ratio of up to 0.9941.

• 조명전기설비학회논문지
• /
• 제27권12호
• /
• pp.101-108
• /
• 2013

This paper presents A Zero-Voltage-Switching(ZVS) Three-Level DC/DC Converter using Primary Clamping Diodes. The Previous ZVS Three-Level DC/DC converter realizes ZVS for the switches with the use of the leakage inductance(or external resonant inductance) and the output capacitors of the switches, however the rectifier diodes suffer from recovery which results in oscillation and voltage spike. In order to solve this problem, this paper proposes a novel ZVS Three-Level DC/DC converter, which introduces two clamping diodes to the basic Three-Level converter to eliminate the oscillation and clamp the rectified voltage to the reflected input voltage.

• 전기학회논문지
• /
• 제58권4호
• /
• pp.671-678
• /
• 2009

This paper presents target operation voltage guidelines of each voltage control area considering both voltage stability and economical efficiency in real power system. EMS(Energy Management System) data, Real-time simulator, shows not only voltage level but lots of information about real power system. Also this paper performs optimal power flow calculation of three objective functions to propose the best target operation voltage. objective function of interchange power flow maximum and active power loss minimization stand for economical efficiency index and reactive power reserve maximum objective unction represents stability index. Then through simulation result using optimazation technique, the most effective objective function is chosen. To sum up, this paper divides voltage control area into twelve considering electric distance characteristics and estimate or voltage level by the passage of time of EMS peak data. And through optimization technique target operation voltage of each voltage control area is estimated and compare heir result. Then it is proposed that the best scenario to keep up voltage stability and maximize economical efficiency in real power system.