• KIEE International Transactions on Electrophysics and Applications
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• 제2C권5호
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• pp.253-257
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• 2002

A new Current-Controlled Driving Method that can drive AC PDPs with low voltage and high luminous efficiency for the sustaining period is presented. In this driving method, the voltage source is connected to a storage capacitor and the stored voltage is delivered to the panel through LC resonance. Thus, this driving method can drive the panel with a voltage source as low as about half of the voltage necessary in the conventional driving methods. The discharge current flowing into the AC PDP is limited in this method. Thus, the power consumption for the discharge is reduced and the discharge input power to output luminance efficiency is improved. Experimental results using this driving method showed that we could drive an AC PDP with a voltage source as low as 146V and that high luminous efficiency of 1.33 1m／W can be achieved.

• 전력전자학회논문지
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• 제10권4호
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• pp.388-396
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• 2005

SRM은 각종 산업분야에서 토크 리플과 소음 진동, 낮은 역률로 인하여 실제 적용에는 어려움이 있고 구동을 하기 위해서는 회전자위치 정보를 위한 센서가 필요하다. 따라서 본 논문에서는 전압펄스 주입방식을 이용한 센서리스 방식을 제안하였다. 기존 전압펄스 주입방식의 문제점인 위상지연 문제와 기존 센서리스 방식의 어려움이라 할 수 있는 초기구동 문제를 제안하였다. 또한 고성능 마이크로프로세서를 사용한 복잡한 연산과정 없이 단순한 범용 아날로그 소자만으로도 간단히 센서리스 방식을 구현하였다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1999년도 하계학술대회 논문집 F
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• pp.2594-2596
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• 1999

Recently, white good market has interest with inverter product, which has merit to on/off type with respect to energy saving and noise. But, inverter product's cost is rising, because of adding inverter circuit component. To reduce cost, inverter gate drive trend is using HVIC which needs only single voltage. Also using HVIC, designer can compact PCB'size. This paper shows application technique and key point of designing HVIC

• 한국전기전자재료학회논문지
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• 제22권7호
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• pp.563-566
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• 2009

This paper presents a motor drive IC for automotive applications. The drive IC is dedicated to control and drive external MOSFETs which directly drive 3-phase motor with a high current. In case of driving high-side power switches, the bootstrap topology is widely used. however, it requires three bootstrap diode and three capacitor respectively. And it needs a minimum charging time to maintain high-side voltage. The motor drive IC uses a charge-pump circuit for all three high-side voltage with various protection schemes for automotive applications.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2009년도 춘계학술대회 논문집
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• pp.41-42
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• 2009

This paper presents a motor drive IC for automotive applications. The drive IC is dedicated to control and drive external MOSFETs which directly drive 3-phase motor with a high current. In case of driving high-side power switches, the bootstrap topology is widely used. However, it requires three bootstrap diode and three capacitor respectively. And it needs a minimum charging time to maintain high-side voltage. The motor drive IC uses a charge-pump circuit for all three high-side voltage with various protection schemes for automotive applications.

• 대한전기학회논문지:전기기기및에너지변환시스템부문B
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• 제50권8호
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• pp.408-415
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• 2001

Using power semiconductor switches such as IGBTs, diodes and L-C circuits, novel repetitive impulse voltage generator is developed. In the presented circuits, high voltage pulse is generated by series-connection of capacitors and IGBTs. Therefore, the high voltage pulse is obtained by circuit configuration without any high voltage pulse transformer and high voltage dc source. Especially, the proposed circuit can operate up to several kHz and have high reliability and longer life than conventional ones. In also gives voltage balance of IBGTs automatically. So, the difference of characteristics of IGBTs and drive signal does not cause severe problems. To verify the proposed circuit, 20kV and 300A pulse generator is manufactured and tested.

• 전자공학회논문지S
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• 제34S권5호
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• pp.94-103
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• 1997

It is necesary that analog buffer circuit should drive an external load in the VLSI design such as switched capacitor efilter (SCF), D/A converter, A/d converter, telecommunicatin circuit, etc. The conventional CMOS buffer circuit have many probvlems according as CMOS technique. Firstly, Capacity of large load ar enot able to opeate well. The problem can be solve to use class AB stages. But large load are operated a difficult, because an element of existing CMOS has a quadratic functional relation with inptu and outut voltage versus output current. Secondly, whole circuit of dynamic rang edecrease, because a range of inpt and output voltages go down according as increasing of intergration rate drop supply voltage. In this paper suggests that new differential CMOS line driver make out of operating an external of large load. In telecommunication's chip case transmission line could be a load. It is necessary that a load operate line driver. The proposal circuit is planned to hav ea high generation power rnage of voltage with preservin linearity. And circuit of capability is inspected through simulation program (HSPICE).

• 대한전기학회:학술대회논문집
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• 대한전기학회 1995년도 추계학술대회 논문집 학회본부
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• pp.312-315
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• 1995

The base/gate drive suppression method proposed by Joshi and Bose is that which detects the output current polarity of the leg and, according to the polarity, suppresses the base/gate drive of one of the ore switching devices of the leg. This method has the merit that it does not have the conventional dead time problem, reduces the power loss of the driving circuit and others. But this method has difficulty in implementation. In this paper, a new base/gate drive suppression method by detecting not the output current polarity but the output voltage polarity is proposed. The proposed method is easier to implement than Joshi and Bose's method.

• Journal of Power Electronics
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• 제9권6호
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• pp.884-891
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• 2009

An address voltage stabilization circuit for the single-side driving (SSD) method for AC plasma display panels (PDP) is proposed. The single-side driving method, which eliminates a common sustaining driver, uses only two electrodes in a three electrode AC PDP structure. The high-impedance (Hi-Z) mode operation of the data drive ICs during the sustaining period is needed for surface gas-discharge without misfiring in the SSD method but it produces the problem that the address voltage increases up to the breakdown voltage. The proposed circuit based on a flyback converter can stabilize the address voltage under the breakdown voltage and provide better surface gas-discharge performance without any misfiring in the SSD scheme.

• 한국정보통신학회논문지
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• 제10권11호
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• pp.2014-2019
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• 2006

PDP구동회로는 160V 이상의 고전압을 유지하기 위한 스위칭 소자와 커패시터를 필요로 한다. 이러한 고전압용 소자의 사용은 PDP 구동회로의 가격을 상승시키고 전력 소모를 증가시키는 원인이 된다. 기존의 PDP 구동회로는 3개의 공급 전압원과 16개의 스위칭 소자로 구성 되어 있다. 그러나 본 논문에서는 2개의 공급 전압원과 12개의 스위칭 노자를 사용하고, 공급 전압도 기존의 공급 전압보다 낮은 공급 전압을 사용하는 구동회로를 제안한다. 컴퓨터시뮬레이션을 통하여 입력 주파수가 70kHz에서 100kHz일 때 45V 이상의 공급전압을 사용한다면 PDP 셀 구동을 위한 충분한 크기의 신호를 얻을 수 있음을 확인하였다.