• Title/Summary/Keyword: Vertical transistor

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Dual Gate L-Shaped Field-Effect-Transistor for Steep Subthreshold Slope

  • Najam, Faraz;Yu, Yun Seop
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2018.05a
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    • pp.171-172
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    • 2018
  • Dual gate L-shaped tunnel field-effect-transistor (DG-LTFET) is presented in this study. DG-LTFET achieves near vertical subthreshold slope (SS) and its ON current is also found to be higher then both conventional TFET and LTFET. This device could serve as a potential replacement for conventional complimentary metal-oxide-semiconductor (CMOS) technology.

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A Power MOSFET with Self Current Limiting Capability (전류 제한 능력을 갖는 전력 MOSFET)

  • 윤종만;최연익;한민구
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.32A no.10
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    • pp.25-34
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    • 1995
  • A new vertical power MOSFET with over-current protection capability is proposed. The MOSFET consists of main power MOSFET cell, sensing MOSFET cell and lateral npn bipolar transistor. The proposed MOSFET may be fabricated by a conventional DMOS process without any additional fabrication step. Overcurrent state is sensed by the newly designed lateral bipolar transistor. Mixed-mode simulations proved that the overcurrent protection is achieved by the proposed MOSFET successfully with a small protection area less than 0.2 % of the total die area.

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A Study on the Electrical Characteristics in the Static Induction Transistor with Trench Oxide (트렌치 산화막을 갖는 정전유도트랜지스터의 전기적 특성에 관한 연구)

  • Kang, Ey-Goo;Kim, Je-Yoon;Hong, Seung-Woo;Sung, ManYoung
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.18 no.1
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    • pp.6-11
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    • 2005
  • In this paper, two types of vertical SIT(Static Induction Transistor) structures are proposed to improve their electrical characteristics including the blocking voltage. Besides, the two dimensional numerical simulations were carried out using ISE-TCAD to verify the validity of the device and examine the electrical characteristics. First, a trench gate region oxide power SIT device is proposed to improve forward blocking characteristics. Second, a trench gate-source region power SIT device is proposed to obtain more higher forward blocking voltage and forward blocking characteristics at the same size. The two proposed devices have superior electrical characteristics when compared to conventional device. In the proposed trench gate oxide power SIT, the forward blocking voltage is considerably improved by using the vertical trench oxide and the forward blocking voltage is 1.5 times better than that of the conventional vertical power SIT. In the proposed trench gate-source oxide power SIT, it has considerable improvement in forward blocking characteristics which shows 1500V forward blocking voltage at -10V of the gate voltage. Consequently, the proposed trench oxide power SIT has the superior stability and electrical characteristics than the conventional power SIT.

Microfabrication of Vertical Carbon Nanotube Field-Effect Transistors on an Anodized Aluminum Oxide Template Using Atomic Layer Deposition

  • Jung, Sunghwan
    • Journal of Electrical Engineering and Technology
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    • v.10 no.3
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    • pp.1169-1173
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    • 2015
  • This paper presents vertical carbon nanotube (CNT) field effect transistors (FETs). For the first time, the author successfully fabricated vertical CNT-based FETs on an anodized aluminum oxide (AAO) template by using atomic layer deposition (ALD). Single walled CNTs were vertically grown and aligned with the vertical pores of an AAO template. By using ALD, a gate oxide material (Al2O3) and a gate metal (Au) were centrally located inside each pore, allowing the vertical CNTs grown in the pores to be individually gated. Characterizations of the gated/vertical CNTs were carried and the successful gate integration with the CNTs was confirmed.

Graphene field-effect transistor for radio-frequency applications : review

  • Moon, Jeong-Sun
    • Carbon letters
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    • v.13 no.1
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    • pp.17-22
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    • 2012
  • Currently, graphene is a topic of very active research in fields from science to potential applications. For various radio-frequency (RF) circuit applications including low-noise amplifiers, the unique ambipolar nature of graphene field-effect transistors can be utilized for high-performance frequency multipliers, mixers and high-speed radiometers. Potential integration of graphene on Silicon substrates with complementary metal-oxide-semiconductor compatibility would also benefit future RF systems. The future success of the RF circuit applications depends on vertical and lateral scaling of graphene metal-oxide-semiconductor field-effect transistors to minimize parasitics and improve gate modulation efficiency in the channel. In this paper, we highlight recent progress in graphene materials, devices, and circuits for RF applications. For passive RF applications, we show its transparent electromagnetic shielding in Ku-band and transparent antenna, where its success depends on quality of materials. We also attempt to discuss future applications and challenges of graphene.

Study on vertical wet etching of aluminum metal film for TFT application

  • Lee, Sang-Hyuk;Seo, Bo-Hyun;Lee, In-Kyu;Seo, Jong-Hyun;Lee, Kang-Woong;Jeon, Jae-Hong;Choe, Hee-Hwan;Ryu, Jong-Hyeok;Park, Byung-Woo;Chang, Dae-Hyun
    • 한국정보디스플레이학회:학술대회논문집
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    • 2009.10a
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    • pp.1479-1482
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    • 2009
  • Compared with tilt transfer wet station, vertical etching system has a variety of advantages that are 50% space savings, higher throughput, fairly good etch uniformity over an entire glass for thin film transistor application. The aim of the present work is to study on a vertical etching system to improve the process factors. The computational fluid dynamics analysis is used to demonstrate the change of the etch uniformity as a function of tilt angle of the glass substrate.

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Memory window characteristics of vertical nanowire MOSFET with asymmetric source/drain for 1T-DRAM application (비대칭 소스/드레인 수직형 나노와이어 MOSFET의 1T-DRAM 응용을 위한 메모리 윈도우 특성)

  • Lee, Jae Hoon;Park, Jong Tae
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.20 no.4
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    • pp.793-798
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    • 2016
  • In this work, the memory window characteristics of vertical nanowire device with asymmetric source and drain was analyzed using bipolar junction transistor mode for 1T-DRAM application. A gate-all-around (GAA) MOSFET with higher doping concentration in the drain region than in the source region was used. The shape of GAA MOSFET was a tapered vertical structure that the source area is larger than the drain area. From hysteresis curves using bipolar junction mode, the memory windows were 1.08V in the forward mode and 0.16V in the reverse mode, respectively. We observed that the latch-up point was larger in the forward mode than in the reverse mode by 0.34V. To confirm the measurement results, the device simulation has been performed and the simulation results were consistent in the measurement ones. We knew that the device structure with higher doping concentration in the drain region was desirable for the 1T-DRAM using bipolar junction mode.

Electrical Characteristics of IGBT for Gate Bias under $\gamma$ Irradiation (게이트바이어스에서 감마방사선의 IGBT 전기적 특성)

  • Lho, Young-Hwan
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.46 no.2
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    • pp.1-6
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    • 2009
  • The experimental results of exposing IGBT (Insulated Gate Bipolar Transistor) samples to gamma radiation source show shifting of threshold voltages in the MOSFET and degradation of carrier mobility and current gains. At low total dose rate, the shift of threshold voltage is the major contribution of current increases, but for more than some total dose, the current is increased because of the current gain degradation occurred in the vertical PNP at the output of the IGBTs. In the paper, the collector current characteristics as a function of gate emitter voltage (VGE) curves are tested and analyzed with the model considering the radiation damage on the devices for gate bias and different dose. In addition, the model parameters between simulations and experiments are found and studied.

Electrical Characteristics of Tunneling Field-effect Transistors using Vertical Tunneling Operation Based on AlGaSb/InGaAs

  • Kim, Bo Gyeong;Kwon, Ra Hee;Seo, Jae Hwa;Yoon, Young Jun;Jang, Young In;Cho, Min Su;Lee, Jung-Hee;Cho, Seongjae;Kang, In Man
    • Journal of Electrical Engineering and Technology
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    • v.12 no.6
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    • pp.2324-2332
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    • 2017
  • This paper presents the electrical performances of novel AlGaSb/InGaAs heterojunction-based vertical-tunneling field-effect transistor (VTFET). The device performance was investigated in views of the on-state current ($I_{on}$), drain-induced barrier thinning (DIBT), and subthreshold swing (SS) as the gate length ($L_G$) was scaled down. The proposed TFET with a $L_G$ of 5 nm operated with an $I_{on}$ of $1.3mA/{\mu}m$, a DIBT of 40 mV/V, and an SS of 23 mV/dec at a drain voltage ($V_{DS}$) of 0.23 V. The proposed TFET provided approximately 25 times lower DIBT and 12 times smaller SS compared with the conventional $L_G$ of 5 nm TFET. The AlGaSb/InGaAs VTFET showed extremely high scalability and strong immunity against short-channel effects.