• 한국초전도ㆍ저온공학회논문지
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• 제14권4호
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• pp.5-11
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• 2012

In this review article, we focus on various co-evaporation technologies developed for the fabrication of high performance $REBa_2Cu_3O_{7-{\delta}}$ (RE: Y and Rare earth elements, REBCO) superconducting films. Compared with other manufacturing technologies for REBCO films such as sputtering, pulsed laser deposition (PLD), metal-organic deposition (MOD), and metal organic chemical vapor deposition (MOCVD), the co-evaporation method has a strong advantage of higher deposition rate because metal sources can be used as precursor materials. After the first attempt to produce REBCO films by the co-evaporation method in 1987, various co-evaporation technologies for high performance REBCO films have been developed during last several decades. The key points of each co-evaporation technology are reviewed in this article, which enables us to have a good insight into a new high throughput process, called as a Reactive Co-Evaporation by Deposition and Reaction (RCE-DR).

• JSTS:Journal of Semiconductor Technology and Science
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• 제4권1호
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• pp.45-51
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• 2004

We have proposed a new shallow trench isolation (STI) process using flowable oxide (F-oxide) chemical vapor deposition (CVD) for DRAM application and it was successfully developed. The combination of F-oxide CVD and HDP CVD is thought to be the superior STI gap-filling process for next generation DRAM fabrication because F-oxide not only improves STI gap-filling capability, but also the reduced local stress by F-oxide in narrow trenches leads to decrease in junction leakage and gate induced drain leakage (GIDL) current. Finally, this process increased data retention time of DRAM compared to HDP STI. However, a serious failure occurred by symphonizing its structural dependency of deposited thickness with poor resistance against HF chemicals. It could be suppressed by reducing the flow time during F-oxide deposition. It was investigated collectively in terms of device yield. In conclusion, the combination of F-oxide and HDP oxide is the very promising technology for STI gap filling process of sub-100nm DRAM technology.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2012년도 제42회 동계 정기 학술대회 초록집
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• pp.580-580
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• 2012

Heterostructures has unique and important properties, which may be helpful for finding many potential applications in the field of electronic, thermoelectric, and optoelectronic devices. We synthesized CdTe/Te core-shell heterostructures by vapor-solid process at low temperatures using a quartz tube furnace. Two step vapor-solid processes were employed. First, various tellurium structures such as nanowires, nanorods, nanoneedles, microtubes and microrods were synthesized under various deposition conditions. These tellurium nanostructures were then used as substrates in the second step to synthesize the CdTe/Te core-shell heterostructures. Using this method, various sizes, shapes and types of CdTe/Te core-shell structures were fabricated under a range of conditions. These structures were analysed by scanning electron microscopy, high resolution transmission electron microscopy, and energy dispersive x-ray spectroscopy. The vapor phase process at low temperatures appears to be an efficient method for producing a variety of Cd/Te hetero-nanostructures. In addition, the hetero-nanostructures can be tailored to the needs of specific applications by deliberately controlling the synthetic parameters.

• 한국표면공학회지
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• 제39권2호
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• pp.82-86
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• 2006

Diamond films were deposited on 10.0$\times$10.0$mm^2$ pretreated (100) Si substrate using $CH_4$, $H_2$ and $O_2$ source gases in a horizontal-type microwave plasma enhanced chemical vapor deposition system. We introduced a cyclic on/off modulation of $CH_4$ and/or $O_2$ flows is a function of the reaction time during the initial deposition stage. Surface morphology and diamond quality of the films were investigated as a function of the different cyclic modulation process of the source gases flows: For the enhancement of the nucleation density, there is an optimal process for the incorporation of oxygen. Diamond qualities of the films were improved by introducing oxygen gas during the initial deposition stage.

• 멤브레인
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• 제30권2호
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• pp.97-110
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• 2020

이산화탄소 포집 및 저장기술(CCS)은 인류발생적 요인에 의한 이산화탄소 배출 증가와 그로 인한 기후변화를 완화시킬 수 있는 기술 중 하나이다. 그 중, 매체 순환식 연소(chemical looping combustion, CLC)와 칼슘루핑(calcium looping) 기술은 현재 아민 스크러빙(amine scrubbing)을 대체할 수 있는 유망한 기술로 주목받고 있다. 두 방법 모두 금속 산화물을 이용한 연속적인 순환 사이클 반응에 의한 것이다. 전체적인 이산화탄소 포집 및 저장 성능의 향상을 위해서는 사이클을 거듭하며 발생하는 소결(sintering)로 인한 안정성 저하 문제를 해결하고 금속 산화물의 구조 또한 최적화해야 한다. 금속 산화물 표면에 얇은 박막을 형성하는 것은 소결로 인한 손상을 막을 수 있는 방법이다. 이러한 박막 제조 기술로 잘 알려진 기술에는 화학기상증착법(chemical vapor deposition)과 원자층증착기술(atomic layer deposition)이 있다. 본 총설에서는 CVD, ALD 기술을 비롯하여 효과적인 반응 안정성 향상을 위한 안정제 첨가 방법, 금속 산화물 구조 개선에 대한 다양한 최근 기술들을 다루었다.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2012년도 제42회 동계 정기 학술대회 초록집
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• pp.100-101
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• 2012

The plasma damage free and room temperature processedthin film deposition technology is essential for realization of various next generation organic microelectronic devices such as flexible AMOLED display, flexible OLED lighting, and organic photovoltaic cells because characteristics of fragile organic materials in the plasma process and low glass transition temperatures (Tg) of polymer substrate. In case of directly deposition of metal oxide thin films (including transparent conductive oxide (TCO) and amorphous oxide semiconductor (AOS)) on the organic layers, plasma damages against to the organic materials is fatal. This damage is believed to be originated mainly from high energy energetic particles during the sputtering process such as negative oxygen ions, reflected neutrals by reflection of plasma background gas at the target surface, sputtered atoms, bulk plasma ions, and secondary electrons. To solve this problem, we developed the NBAS (Neutral Beam Assisted Sputtering) process as a plasma damage free and room temperature processed sputtering technology. As a result, electro-optical properties of NBAS processed ITO thin film showed resistivity of $4.0{\times}10^{-4}{\Omega}{\cdot}m$ and high transmittance (>90% at 550 nm) with nano- crystalline structure at room temperature process. Furthermore, in the experiment result of directly deposition of TCO top anode on the inverted structure OLED cell, it is verified that NBAS TCO deposition process does not damages to the underlying organic layers. In case of deposition of transparent conductive oxide (TCO) thin film on the plastic polymer substrate, the room temperature processed sputtering coating of high quality TCO thin film is required. During the sputtering process with higher density plasma, the energetic particles contribute self supplying of activation & crystallization energy without any additional heating and post-annealing and forminga high quality TCO thin film. However, negative oxygen ions which generated from sputteringtarget surface by electron attachment are accelerated to high energy by induced cathode self-bias. Thus the high energy negative oxygen ions can lead to critical physical bombardment damages to forming oxide thin film and this effect does not recover in room temperature process without post thermal annealing. To salve the inherent limitation of plasma sputtering, we have been developed the Magnetic Field Shielded Sputtering (MFSS) process as the high quality oxide thin film deposition process at room temperature. The MFSS process is effectively eliminate or suppress the negative oxygen ions bombardment damage by the plasma limiter which composed permanent magnet array. As a result, electro-optical properties of MFSS processed ITO thin film (resistivity $3.9{\times}10^{-4}{\Omega}{\cdot}cm$, transmittance 95% at 550 nm) have approachedthose of a high temperature DC magnetron sputtering (DMS) ITO thin film were. Also, AOS (a-IGZO) TFTs fabricated by MFSS process without higher temperature post annealing showed very comparable electrical performance with those by DMS process with $400^{\circ}C$ post annealing. They are important to note that the bombardment of a negative oxygen ion which is accelerated by dc self-bias during rf sputtering could degrade the electrical performance of ITO electrodes and a-IGZO TFTs. Finally, we found that reduction of damage from the high energy negative oxygen ions bombardment drives improvement of crystalline structure in the ITO thin film and suppression of the sub-gab states in a-IGZO semiconductor thin film. For realization of organic flexible electronic devices based on plastic substrates, gas barrier coatings are required to prevent the permeation of water and oxygen because organic materials are highly susceptible to water and oxygen. In particular, high efficiency flexible AMOLEDs needs an extremely low water vapor transition rate (WVTR) of $1{\times}10^{-6}gm^{-2}day^{-1}$. The key factor in high quality inorganic gas barrier formation for achieving the very low WVTR required (under ${\sim}10^{-6}gm^{-2}day^{-1}$) is the suppression of nano-sized defect sites and gas diffusion pathways among the grain boundaries. For formation of high quality single inorganic gas barrier layer, we developed high density nano-structured Al2O3 single gas barrier layer usinga NBAS process. The NBAS process can continuously change crystalline structures from an amorphous phase to a nano- crystalline phase with various grain sizes in a single inorganic thin film. As a result, the water vapor transmission rates (WVTR) of the NBAS processed $Al_2O_3$ gas barrier film have improved order of magnitude compared with that of conventional $Al_2O_3$ layers made by the RF magnetron sputteringprocess under the same sputtering conditions; the WVTR of the NBAS processed $Al_2O_3$ gas barrier film was about $5{\times}10^{-6}g/m^2/day$ by just single layer.

• 한국세라믹학회지
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• 제50권2호
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• pp.122-126
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• 2013

The surface roughness of the inner and outer surfaces of a tube is an important requirement for nuclear fuel cladding. When an inner SiC clad tube, which is considered as an advanced Pressurized Water Cooled Reactor (PWR) clad with a three-layered structure, is fabricated by Chemical Vapor Deposition (CVD), the surface roughness of the substrate, graphite, is an important process parameter. The surface character of the graphite substrate could directly affect the roughness of the inner surface of SiC deposits, which is in contact with a substrate. To evaluate the effects of the surface roughness changes of a substrate, SiC deposits were fabricated using different types of graphite substrates prepared by the following four polishing paths and heat-treatment for purification: (1) polishing with #220 abrasive paper (PP) without heat treatment (HT), (2) polishing with #220 PP with HT, (3) #2400 PP without HT, (4) polishing with #2400 PP with HT. The average surface roughnesses (Ra) of each deposited SiC layer are 4.273, 6.599, 3.069, and $6.401{\mu}m$, respectively. In the low pressure SiC CVD process with a graphite substrate, the removal of graphite particles on the graphite surface during the purification and the temperature increasing process for CVD seemed to affect the surface roughness of SiC deposits. For the lower surface roughness of the as-deposited interlayer of SiC on the graphite substrate, the fine controlled processing with the completed removal of rough scratches and cleaning at each polishing and heat treating step was important.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2013년도 제44회 동계 정기학술대회 초록집
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• pp.659-659
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• 2013

Recently, graphene has been intensively studied due to the fascinating physical, chemical and electrical properties. It shows high carrier mobility, high current density, and high thermal conductivity compare with conventional semiconductor materials even it has single atomic thickness. Especially, since graphene has fantastic electrical properties many researchers are believed that graphene will be replacing Si based technology. In order to realize it, we need to prepare the large and uniform graphene. Chemical vapor deposition (CVD) method is the most promising technique for synthesizing large and uniform graphene. Unfortunately, CVD method requires transfer process from metal catalyst. In transfer process, supporting polymer film (Such as poly (methyl methacrylate)) is widely used for protecting graphene. After transfer process, polymer layer is removed by organic solvents. However, it is impossible to remove it completely. These organic residues on graphene surface induce quality degradation of graphene since it disturbs movement of electrons. Thus, in order to get an intrinsic property of graphene completely remove of the organic residues is the most important. Here, we introduce modified wet graphene transfer method without PMMA. First of all, we grow the graphene from Cu foil using CVD method. And then, we deposited several metal films on graphene for transfer layer instead of PMMA. Finally, we fabricate graphene FET devices. Our approaches show low defect density and non-organic residues in comparison with PMMA coated graphene through Raman spectroscopy, SEM and AFM. In addition, clean graphene FET shows intrinsic electrical characteristic and high carrier mobility.

• Journal of Information Display
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• 제4권2호
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• pp.1-6
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• 2003

In this paper, we demonstrate that the organic electrophosphorescent device is driven by the organic thin film transistor with spin-coated photoacryl gate insulator. It was found that electrical output characteristics in our organic thin film transistors using the staggered-inverted top-contact structure showed the non-saturated slope in the saturation region and the sub-threshold nonlinearity in the triode region, where we obtained the maximum power luminance that was about 90 $cd/m^2$. Field effect mobility, threshold voltage, and on-off current ratio in 0.45 ${\mu}m$ thick gate dielectric layer were 0.17 $cm^2/Vs$, -7 V, and $10^6$ , respectively. In order to form polyimide as a gate insulator, vapor deposition polymerization process was also introduced instead of spin-coating process, where polyimide film was co-deposited by high-vacuum thermal evaporation from 4,4'-oxydiphthalic anhydride (ODPA) and 4,4'-oxydianiline (ODA) and cured at 150${\sqsubset}$for 1hr. It was also found that field effect mobility, threshold voltage, on-off current ratio, and sub-threshold slope with 0.45 ${\mu}m$ thick gate dielectric films were 0.134 $cm^2/Vs$, -7 V, and $10^6$ A/A, and 1 V/decade, respectively.

• 한국재료학회지
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• 제32권12호
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• pp.522-527
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• 2022

Among efforts to improve techniques for the chemical vapor deposition of large-area and high-quality graphene films on transition metal substrates, being able to reliably transfer these atomistic membranes onto the desired substrate is a critical step for various practical uses, such as graphene-based electronic and photonic devices. However, the most used approach, the wet etching transfer process based on the complete etching of metal substrates, remains a great challenge. This is mainly due to the inevitable damage to the graphene, unintentional contamination of the graphene layer, and increased production cost and time. Here, we report the systematic study of an H₂ bubbling-assisted transfer technique for graphene films grown on Cu foils, which is nondestructive not only to the graphene film but also to the Cu substrate. Also, we demonstrate the origin of the graphene film tearing phenomenon induced by this H₂ bubbling-assisted transfer process. This study reveals that inherent features are produced by rolling Cu foil, which cause a saw-like corrugation in the poly(methyl methacrylate) (PMMA)/graphene stack when it is transferred onto the target substrate after the Cu foil is dissolved. During the PMMA removal stage, the graphene tearing mainly appears at the apexes of the corrugated PMMA/graphene stack, due to weak adhesion to the target substrate. To address this, we have developed a modified heat-press-assisted transfer technique that has much better control of both tearing and the formation of residues in the transferred graphene films.