• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.11
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• pp.57-62
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• 2011

In this paper, an efficient architecture for MFVLD(Multi-Format Variable Length Decoder) which can process H.264, MPEG-2, MPEG-4, AVS, VC-1 bitstream is proposed. The proposed MF-VLD is designed to be adapted to the MPSOC (Multi-processor System on Chip) architecture, uses bit-plane algorithm for the processing of inverse quantized data to reduce the width of AHB bus. External SDRAM is used to minimize the internal memory size. In this architecture, the adding or removing each variable length decoder can be easily done by using multiplexor. The designed MF-VLD can be operated in 200MHz at 0.18um process. The gate size is 657K gate and internal memory size is 27Kbyte.

• Journal of the Korean Academy of Child and Adolescent Psychiatry
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• v.8 no.1
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• pp.101-112
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• 1997

The purpose of this study was to examine usefulness of KEDI-Individual Basic Learning Skills Test as a diagnostic tool of learning disorders(LD). Learning disorder group consisted of two subgroups, verbal learning disorder group(VLD, n＝34) and nonverbal learning disorder group(NVLD, n＝14). Comparison group consisted of Dysthymia Disorder subgroup(n＝11) and Normal subgroup(n＝20). Performance of intelligence test and achievement test was examined in all 4 subgroups. In KEDI-WISC, VLD subgroup revealed primary problems in vocabulary, information and verbal-auditory attention test. NVLD group revealed primary problems in almost all performance tests such as visual acuity, psycho-motor coordination speed and visual-spatial organizations ability subtest. In KEDI-Individual Basic Learning Test, VLD group revealed primary problems in phonological coding process, word recognition and mathematics. For successful classification of LD children, the importance of achievement test and intelligence test was discussed by discriminant analysis and factor analysis. The results indicate that KEDI-Individual Basic Learning Skills is of considerable usefulness in diagnosing LD, but must be used in subtests, and additional tests must be conducted for thorough exploration of LD.

• Journal of Microbiology and Biotechnology
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• v.16 no.8
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• pp.1311-1315
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• 2006

Aminocyclitol antibiotic validamycin A, a prime control agent for sheath blight disease of rice plants, is biosynthesized by Streptomyces hygroscopicus var. limoneus. Within the validamycin biosynthetic gene cluster, vldBC forms an operon of vldABC with vidA, the gene encoding 2-epi-5-epi-valiolone synthase. Biochemical studies, employing the recombinant proteins from Escherichia coli, established VldB and VldC as D-glucose $\alpha$-1-phosphate uridylyltransferase and glucokinase, respectively. This finding substantiates that the validamycin biosynthetic gene cluster harbors genes encoding the enzymes for UDP-glucose formation from glucose. Therefore, we propose that validamycin biosynthesis employs its own catalysts to generate UDP-glucose, but not depending on the primary metabolism.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.33B no.1
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• pp.79-86
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• 1996

In this paper we propose an architecture for VLC(Variable Length Coder) and VLD(Variable Length Decoder) which is simple with respect to implementation point and efficient in memory. We implemented encoding and decoding circuit where we need only 7-bit address memory space for 114 MPEG1 DCT coefficients and employed minimal number of flip-flops and logics for an architecture to integrate a shift register for serial-to-parallel or parallel-to-serial conversion of the data in code mapping ROM. We obtained 50Mbps operating speed in both encoding and decoding process as the result of simulation using 0.80.8${\mu}m$ CMOS standard cells.

• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.759-760
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• 2006

In this paper, The author designed on high speed VLD(Variable Length Decoder) using shift buffer. Variable Length Decoder is received N bit data from input block and decode the input signal using Shifting Buffer, Length Decoder and Symbol Decoder blocks. The inner part of shifting buffer in proposed Variable Length Decoder is filled input data and then operating therefore, the proposed structure can improve the decoded speed. And in this paper we applying pipeline structure therefore data is decoded in every clock.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.46 no.5
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• pp.151-161
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• 2009

Audio Video Standard (AVS) is the audio and video compression standard that was developed for domestic video applications in China. AVS employs low complexity tools to minimize degradation of RD performance of the state-the-art video codec, H.264/AVC. The AVS video codec consists of $8{\times}8$ block prediction and the same size transform to improve compression efficiency for VGA and higher resolution sequences. Currently, the AVS has been adopted more and more for IPTV services and mobile applications in China. So, many consumer electronics companies and multimedia-related laboratories have been developing applications and chips for the AVS. In this paper, we implemented the AVS video decoder and optimize it on TI's Davinci EVM DSP board. For improving the decoding speed and clocks, we removed unnecessary memory operations and we also used high-speed VLD algorithm, linear assembly, intrinsic functions and so forth. Test results show that decoding speed of the optimized decoder is $5{\sim}7$ times faster than that of the reference software (RM 5.2J).

• 한국신재생에너지학회:학술대회논문집
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• 2006.11a
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• pp.494-497
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• 2006

For commercialization of polymer electrolytemembrane fuel cell (PEMFC), durability of membrane electrode assemblies (MEAs) has to be improved. Especially, long-term stability of MEA is one of the most important issues for frequent shut-down and start-up processes of PEMFC. The degradation of MEA could be attributed to chemical attack of hydrogen peroxide radicals that are formed at high cell voltages without any special treatment to remove residual hydrogen from anode gas channel after shut-down of the fuel cell. In this study, we investigated the long-term stability of MEA under different on/off operation conditions. Residential hydrogen gas was removed from the anode flow channel by purging air or nitrogen. Also, a dummy resistance was applied to the fuel cell to exhaust residential hydrogen at the anode. In these cases, MEA showed much more stable durability. Electrochemical characteristics of the fuel cell were measured byrepeating the on/off cycles with the hydrogen removal processes. Also, degradation of MEA components was examined by SEM, TEM and XRD analyses.

• Proceedings of the IEEK Conference
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• 2001.06d
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• pp.41-44
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• 2001

Variable length coding (VLC) has been used in many well known standard video coding algorithms such as MPEG and H.26x. However, VLC can not be processed parallelly because of its sequentiality. This sequentiality is a big barrier for implementing a real-time software video codec since parallel schemes can not be applied. In this paper, we propose a new fast VLD (Variable Length Decoding) method based on the probabilistic distribution of symbols in VLC tables used in MPEG as well as H.263 standard codecs. Even though MPEG suggests the table partitioning method, they do not show theoretically why the number of partitioned tables is two or three. We suggest the method for deciding the number of partitioned tables. Applying our scheme to several well-known MPEG-2 test sequences, we can reduce the computational time up to about 10% without any sacrificing video quality

• Proceedings of the IEEK Conference
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• 2000.09a
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• pp.725-728
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• 2000

본 논문에서는 영상검색 기법에서 핵심인 Shot Change Detection 과 Non Linear Browsing 을 H/W기반으로 구현하여, S/W 적으로는 비실시간으로만 가능하였던 video indexing 을 DTV 에 적용하여 실시간으로 구현하는 방법을 제시한다. 이를 위해 H/W part 는 실시간으로 들어오는 방송용 MPEG-2 bitstream 을 full decoding 이 아닌 최소화된 VLD(Variable Length Decoding) 수준의 parsing 으로 picture 내의 luminance와 chrominance 의 DC 값, macroblock type, motion vector 정보를 얻어내어 각각의 histogram을 계산하여 memory interface를 통해 S/W 측에 넘겨주게 되고 S/W 는 각 상황에 맞게 indexing algorithm 을 변화시키며 최적의 video indexing 방법으로 확장할 수 있도록 하였다.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.22 no.6
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• pp.1377-1384
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• 1997

We propose a new scheme to provide the fast forward and reverse(FF/R) functions to users in Video On Demand Service System. The proposed scheme is to use only I and P pictures obtained by sampling MPEG2 bit-steam. New frame raes for FF/R play are specified with parameters of MPEG2 syntrx. Bits of I and P pictures are reduced in three steps: Variable length decoding(VLD), Inverse quantization and Requantization. The proposed scheme is ecnomical in the sense that it can provide FF/R function without any additional requirement on the bandwidth and on the storage media in video server.