• Journal of Astronomy and Space Sciences
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• v.27 no.2
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• pp.145-152
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• 2010

In this paper, we developed a local oscillator (LO) system of millimeter wave band receiver for radio astronomy observation. We measured the phase and amplitude drift stability of this LO system. The voltage control oscillator (VCO) of this LO system use the 3 mm band Gunn oscillator. We developed the digital phase locked loop (DPLL) module for the LO PLL function that can be computer-controlled. To verify the performance, we measured the output frequency/power and the phase/amplitude drift stability of the developed module and the commercial PLL module, respectively. We show the good performance of the LO system based on the developed PLL module from the measured data analysis. The test results and discussion will be useful tutorial reference to design the LO system for very long baseline interferometry (VLBI) receiver and single dish radio astronomy receiver at the 3 mm frequency band.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.4
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• pp.32-38
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• 2011

This paper describes implementation of the 5.0GHz RF frequency synthesizer with 0.18${\mu}m$ silicon CMOS technology being used as an application of the IEEE802.15.4 USN sensor node transceiver modules. To get good performance of speed and noise, design of the each module like VCO, prescaler, 1/N divider, fractional divider with ${\Sigma}-{\Delta}$ modulator, and common circuits of the PLL has been optimized. Especially to get excellent performance of high speed and wide tuning range, N-P MOS core structure and 12 step cap banks have been used in design of the VCO. The chip area including pads for testing is $1.1{\times}0.7mm^2$, and the chip area only core for IP in SoC is $1.0{\times}0.4mm^2$. Through analysing of the fabricated frequency synthesizer, we can see that it has wide operation range and excellent frequency characteristics.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.12
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• pp.57-63
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• 2016

This paper describes implementation of the RF frequency synthesizer with $0.18{\mu}m$ silicon CMOS technology being used as an application of the IEEE802.15.4g SUN sensor node transceiver modules. Design of the each module like VCO, prescaler, 1/N divider, ${\Delta}-{\Sigma}$ modulator, and common circuits of the PLL has been optimized to obtain high speed and low noise performance. Especially, the VCO has been designed with NP core structure and 13 steps cap-bank to get high speed, low noise, and wide band tuning range. The output frequencies of the implemented synthesizer is 1483MHz~2017MHz, the phase noise of the synthesizer is -98.63dBc/Hz at 100KHz offset and -122.05dBc/Hz at 1MHz offset.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.5
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• pp.49-54
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• 2009

This paper describes implementation of the 1.9GHz RF frequency synthesizer with $0.18{\mu}m$ silicon CMOS technology being used as an application of the USN sensor node transceiver modules. To get good performance of speed and noise, design of the each module like VCO, prescaler, 1/N divider, fractional divider with ${\Sigma }-{\Delta}$ modulator, and common circuits of the PLL has been optimized. Especially to get good performance of speed, power consumption, and wide tuning range, N-P MOS core structure has been used in design of the VCO. The chip area including pads for testing is $1.2{\times}0.7mm^2$, and the chip area only core for IP in SoC is $1.1{\times}0.4mm^2$. The test results show that there is no special spurs except -63.06dB of the 6MHz reference spurs in the PLL circuitry. There is good phase noise performance like -116.17dBc/Hz in 1MHz offset frequency.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.45 no.6
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• pp.87-93
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• 2008

This paper describes implementation of the 5.0GHz RF frequency synthesizer with $0.18{\mu}m$ silicon CMOS technology being used as an application of the IEEE802.15.4 USN sensor node transceiver modules. To get good performance of speed and noise, design of the each module like VCO, prescaler, 1/N divider, fractional divider with ${\Sigma}-{\Delta}$ modulator, and common circuits of the PLL has been optimized. Especially to get good performance of speed, power consumption, and wide tuning range, N-P MOS core structure has been used in design of the VCO. The chip area including pads for testing is $1.1*0.7mm^2$, and the chip area only core for IP in SoC is $1.0*0.4mm^2$. Through comparing and analysing of the designed two kind of the frequency synthesizer, we can conclude that if we improve a litter characteristics there is no problem to use their as IPs.

• Proceedings of the KIEE Conference
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• 2003.11b
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• pp.339-342
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• 2003

This paper describes an RF/IF module for 2.4GHz wireless video and audio receivers The designed circuits are implemented using a Teflon board of which the size is $53mm\times42mm$. The measured LNA gain is 15dB, and the VCO output levels are around 2dBm. The sensitivity of the receiver is about -80dBm. The manufactured module consumes 140nA from a 8V supply.

• The Journal of The Korea Institute of Intelligent Transport Systems
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• v.2 no.2 s.3
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• pp.1-12
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• 2003

DAB(Digital audio broadcasting) is a next generation radio broadcasting system which provides CD quality audio, various data services and superior reception ability when moving. Also, it can show traffic informations and news literally or graphically. In this paper, we design and fabricate the DAB tuner for ITS service that follows Eureka-147 and ETSI 300 401 specifications. This small-sized tuner can be adopted to mny electronic equipments such as a Hi-Fi audio, DVD player, car audio system etc.. The overall performance of the tuner depends on a phase noise of VCO and the sensitivity of the receiving system is influenced by LNA, image rejection filter and channel selection filter. All our measurement results satisfy the specification for a DAB system with the return loss of 9dB, the noise figure of 6dB for both Band 111 and L-band and the sensitivity of -97dBm.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2015.10a
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• pp.941-944
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• 2015

In this paper study for VSAT(very small aperture terminal) LNB(low noise block). ship LNB was demanded high stability and low noise figure. We designed FEM(Front-End Module) that was operated multi-band. FEM designed was constructed in a multi-band low noise receiver amplifier, a frequency converter, IF amplifier, Voltage Control Oscillator signal generating circuit four circuit using. To convert the multi-band 2.05GHz band, it generates four local oscillator signals, the four(band1, band2, band3, band4) designed to output an IF signal developed conversion apparatus, the conversion gain 64dB, noise figure 1dB or less, output P1dB 15dBm or more, phase noise showed -73dBc@100Hz.

• Journal of electromagnetic engineering and science
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• v.9 no.4
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• pp.188-193
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• 2009

A K-band low-power miniaturized planar-type hyperthermia system was developed to replace massive and expensive equipment. The system consists of a VCO with a buffer amplifier, a high-power amplifier module, a 20-dB-coupled line coupler, a chip circulator and two power detectors for signal generation, amplification and power monitoring. All these components have been implemented in planar form on two module blocks. The total size of the hyperthermia system was less than $10\times6.5\times3\;cm^3$. In order to verify the system performance, ablations were carried out on nude mice xenografted with human breast cancer. Ablation results show performance comparable to the massive components-based system. This work shows the feasibility of a low-cost miniaturized hyperthermia system for practical clinical applications.