• Title/Summary/Keyword: V.A.K.

Search Result 24,917, Processing Time 0.053 seconds

Prototype Development of 3-Phase 3.3kV/220V 6kVA Modular Semiconductor Transformer (3상 3.3kV/220V 6kVA 모듈형 반도체 변압기의 프로토타입 개발)

  • Kim, Jae-Hyuk;Kim, Do-Hyun;Lee, Byung-Kwon;Han, Byung-Moon;Lee, Jun-Young;Choi, Nam-Sup
    • The Transactions of The Korean Institute of Electrical Engineers
    • /
    • v.62 no.12
    • /
    • pp.1678-1687
    • /
    • 2013
  • This paper describes a prototype of 3-phase 3.3kV/220V 6kVA modular semiconductor transformer developed in the lab for feasibility study. The developed prototype is composed of three single-phase units coupled in Y-connection. Each single-phase unit with a rating of 1.9kV/127V 2kVA consists of a high-voltage high-frequency resonant AC-DC converter, a low-voltage hybrid-switching DC-DC converter, and a low-voltage hybrid-switching DC-AC converter. Also each single-phase unit has two DSP controllers to control converter operation and to acquire monitoring data. Monitoring system was developed based on LabView by using CAN communication link between the DSP controller and PC. Through various experimental analyses it was verified that the prototype operates with proper performance under normal and sag condition. The system efficiency can be improved by adopting optimal design and replacing the IGBT switch with the SiC MOSFET switch. The developed prototype confirms a possibility to build a commercial high-voltage high-power semiconductor transformer by increasing the number of series-connected converter modules in high-voltage side and improving the performance of switching element.

Electrical and Mechanical Noise Study of the 765kV Transmission Line (765kV 송전선로의 전기적 및 기계적 소음고찰)

  • Lee,
    • Journal of KSNVE
    • /
    • v.6 no.1
    • /
    • pp.89-95
    • /
    • 1996
  • If the transmission line voltage is greater than 500kV, audible noise (AN) and hum noise (HN) due to corona discharges on the conductor would be an important design factor for the conductor selection of transmission line. Also there is an aeolian noise: wind noise(WN) from the tower and the conductor due to wind. This paper presents the results of a statistical analysis of audible noise, hum noise, aeolian noise of 6-480mm$^{2}$ conductor bundle in KEPRI 765kV Test Transmission Line which was constructed to develop 765kV double circuit AC transmission line for the first time in the world. The result of the analysis shows that 6-480mm$^{2}$ conductor bundle and tower satisfy configuration the audible noise design criterion of 50dB(A).

  • PDF

STRONG MORI MODULES OVER AN INTEGRAL DOMAIN

  • Chang, Gyu Whan
    • Bulletin of the Korean Mathematical Society
    • /
    • v.50 no.6
    • /
    • pp.1905-1914
    • /
    • 2013
  • Let D be an integral domain with quotient field K, M a torsion-free D-module, X an indeterminate, and $N_v=\{f{\in}D[X]|c(f)_v=D\}$. Let $q(M)=M{\otimes}_D\;K$ and $M_{w_D}$={$x{\in}q(M)|xJ{\subseteq}M$ for a nonzero finitely generated ideal J of D with $J_v$ = D}. In this paper, we show that $M_{w_D}=M[X]_{N_v}{\cap}q(M)$ and $(M[X])_{w_{D[X]}}{\cap}q(M)[X]=M_{w_D}[X]=M[X]_{N_v}{\cap}q(M)[X]$. Using these results, we prove that M is a strong Mori D-module if and only if M[X] is a strong Mori D[X]-module if and only if $M[X]_{N_v}$ is a Noetherian $D[X]_{N_v}$-module. This is a generalization of the fact that D is a strong Mori domain if and only if D[X] is a strong Mori domain if and only if $D[X]_{N_v}$ is a Noetherian domain.

CONJUGATE LOCI OF 2-STEP NILPOTENT LIE GROUPS SATISFYING J2z = <Sz, z>A

  • Jang, Chang-Rim;Lee, Tae-Hoon;Park, Keun
    • Journal of the Korean Mathematical Society
    • /
    • v.45 no.6
    • /
    • pp.1705-1723
    • /
    • 2008
  • Let n be a 2-step nilpotent Lie algebra which has an inner product <, > and has an orthogonal decomposition $n\;=z\;{\oplus}v$ for its center z and the orthogonal complement v of z. Then Each element z of z defines a skew symmetric linear map $J_z\;:\;v\;{\longrightarrow}\;v$ given by <$J_zx$, y> = for all x, $y\;{\in}\;v$. In this paper we characterize Jacobi fields and calculate all conjugate points of a simply connected 2-step nilpotent Lie group N with its Lie algebra n satisfying $J^2_z$ = A for all $z\;{\in}\;z$, where S is a positive definite symmetric operator on z and A is a negative definite symmetric operator on v.

Design of Superconducting Magnets for a 600 kJ SMES (600 kJ SMES System의 초전도 마그넷 설계)

  • Park, M.J.;Kwak, S.Y.;Lee, S.W.;Kim, W.S.;Hahn, S.Y.;Choi, K.D.;Han, J.H.;Lee, J.K.;Jung, H.K.;Seong, K.C.;Hahn, S.Y.
    • Progress in Superconductivity
    • /
    • v.8 no.1
    • /
    • pp.113-118
    • /
    • 2006
  • The design of superconducting magnets for a 600 kJ SEMS was discussed. The basic constraint conditions in the design of a 600 kJ SMES magnet were V-I loss(<1 W), inductance of magnet(<24 H), the number of Double Pancake Coils(DPC about 10), the number of turns of DPC(<300), outer diameter of DPC(close to 800 mm) and total length of HTS wire in a DPC(<500 m). As a result of optimum design, we obtained design parameters of the 600 kJ SMES magnet with two operating currents, 360 A and 370 A, which are in the limited conditions without V-I loss. V-I loss of each operating current was calculated with design parameters and V-I characteristic of the HTS wire. As a result of calculations, V-I losses with operating currents of 360 A and 370 A were 0.6 W and 1.86 W, respectively. Even though all design parameters of the SMES magnet in case of operating current of 360 A were in the restricted conditions, V-I loss of SMES magnet showed a tendency to generate at local DPCs, which are located on the top and the bottom of the SMES magnet more than that of the other DPCs.

  • PDF

On the Metric Dimension of Corona Product of a Graph with K1

  • Mohsen Jannesari
    • Kyungpook Mathematical Journal
    • /
    • v.63 no.1
    • /
    • pp.123-129
    • /
    • 2023
  • For an ordered set W = {w1, w2, . . . , wk} of vertices and a vertex v in a connected graph G, the k-vector r(v|W) = (d(v, w1), d(v, w2), . . . , d(v, wk)) is called the metric representation of v with respect to W, where d(x, y) is the distance between the vertices x and y. A set W is called a resolving set for G if distinct vertices of G have distinct metric representations with respect to W. The minimum cardinality of a resolving set for G is its metric dimension dim(G), and a resolving set of minimum cardinality is a basis of G. The corona product, G ⊙ H of graphs G and H is obtained by taking one copy of G and n(G) copies of H, and by joining each vertex of the ith copy of H to the ith vertex of G. In this paper, we obtain bounds for dim(G ⊙ K1), characterize all graphs G with dim(G ⊙ K1) = dim(G), and prove that dim(G ⊙ K1) = n - 1 if and only if G is the complete graph Kn or the star graph K1,n-1.

Consideration on the trial operation of 765kV substation (765kV 변전소 시운전에 관한 고찰)

  • Byun, Gang;Jung, S.H.;Park, K.W.;Lee, S.M.;Choi, M.S.
    • Proceedings of the KIEE Conference
    • /
    • 2002.11b
    • /
    • pp.29-31
    • /
    • 2002
  • Purpose of the 765kV trial operation conducted for the first time in our country are performance verification of domestic developed equipment(765kV M.Tr, GIS,etc) and extraction of problem in advance to commercial operation and cultivation of operation ability. The trial operation of 765kV substation was finished successfully under the positive supports of institutes. manufactures. and constructers. It is expected that extraction of problems in advance and accumulation of operation techniques through the trial operation of 765kV substation will be contributed largly to the realization of the without a hitch operation of 765kV system.

  • PDF

A Low Power SRAM using Supply Voltage Charge Recycling (공급전압 전하재활용을 이용한 저전력 SRAM)

  • Yang, Byung-Do;Lee, Yong-Kyu
    • Journal of the Institute of Electronics Engineers of Korea SD
    • /
    • v.46 no.5
    • /
    • pp.25-31
    • /
    • 2009
  • A low power SRAM using supply voltage charge recycling (SVCR-SRAM) scheme is proposed. It divides into two SRAM cell blocks and supplies two different powers. A supplied power is $V_{DD}$ and $V_{DD}/2$. The other is $V_{DD}/2$ and GND. When N-bit cells are accessed, the charge used in N/2-bit cells with VDD and $V_{DD}/2$ is recycled in the other N/2-bit cells with $V_{DD}/2$ and GND. The SVCR scheme is used in the power consuming parts which bit line, data bus, word line, and SRAM cells to reduce dynamic power. The other parts of SRAM use $V_{DD}$ and GND to achieve high speed. Also, the SVCR-SRAM results in reducing leakage power of SRAM cells due to the body-effect. A 64K-bit SRAM ($8K{\times}8$bits) is implemented in a $0.18{\mu}m$ CMOS process. It saves 57.4% write power and 27.6% read power at $V_{DD}=1.8V$ and f=50MHz.

Effects of the V/III ratio on a-plane GaN epitaxial layer on r-plane sapphire grown by HVPE (r-Plane sapphire 위에 HVPE에 의해 성장한 a-plane GaN에피텍셜층의 V/III족 ratio에 따른 특성 변화)

  • Ha, Ju-Hyung;Park, Mi-Seon;Lee, Won-Jae;Choi, Young-Jun;Lee, Hae-Yong
    • Journal of the Korean Crystal Growth and Crystal Technology
    • /
    • v.24 no.3
    • /
    • pp.89-93
    • /
    • 2014
  • In this study, effects of the V/III ratio on a-plane GaN epitaxial on r-plane grown by HVPE have been investigated. According to increasing of V/III ratio, the value of FWHM of a-plane (11-20) GaN and the value of surface roughness (Ra) were decreased. Growth rate of a-plane GaN epitaxial layer were increased until V/III ratio = 7 as the increasing of V/III ratio, but it was reduced at V/III ratio = 10. At V/III ratio = 10, the FWHM of a-plane (11-20) GaN RC and the surface roughness (Ra) were 829 arcsec and 1.58 nm, respectively, as the lowest value in this study. Also for V/III ratio = 10, cracks under surface or voids were observed the lowest values in images of optical microscope. An M-shaped azimuthal dependence over $360^{\circ}$ angle range was observed for all samples. At V/III ratio = 10, the difference of FWHM of a-plane GaN between $0^{\circ}$ and $90^{\circ}$ was 439 arcsec revealed as the lowest value in the 4 samples.

nBn Based InAs/GaSb Type II Superlattice Detectors with an N-type Barrier Doping for the Long Wave Infrared Detection (InAs/GaSb 제2형 응력 초격자 nBn 장적외선 검출소자 설계, 제작 및 특성평가)

  • Kim, Ha Sul;Lee, Hun;Klein, Brianna;Gautam, Nutan;Plis, Elena A.;Myers, Stephen;Krishna, Sanjay
    • Journal of the Korean Vacuum Society
    • /
    • v.22 no.6
    • /
    • pp.327-334
    • /
    • 2013
  • Long-wave infrared detectors using the type-II InAs/GaSb strained superlattice (T2SL) material system with the nBn structure were designed and fabricated. The band gap energy of the T2SL material was calculated as a function of the thickness of the InAs and GaSb layers by the Kronig-Penney model. Growth of the barrier material ($Al_{0.2}Ga_{0.8}Sb$) incorporated Te doping to reduce the dark current. The full width at half maximum (FWHM) of the $1^{st}$ satellite superlattice peak from the X-ray diffraction was around 45 arcsec. The cutoff wavelength of the fabricated device was ${\sim}10.2{\mu}m$ (0.12 eV) at 80 K while under an applied bias of -1.4 V. The measured activation energy of the device was ~0.128 eV. The dark current density was shown to be $1.0{\times}10^{-2}A/cm^2$ at 80 K and with a bias -1.5 V. The responsivity was 0.58 A/W at $7.5{\mu}m$ at 80 K and with a bias of -1.5 V.