• 대한치과기공학회지
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• 제42권2호
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• pp.81-89
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• 2020

Purpose: This in vitro study was conducted to evaluate the marginal and internal fit of three-unit Co-Cr frameworks fabricated by computer-aided metal milling and direct metal laser sintering(DMLS) systems in comparison to conventional casting method. Methods: Three-unit Co-Cr frameworks were fabricated by conventional wax up with casting(CWC), computer-aided metal milling(MM) and direct metal laser sintering(DMLS)(n=10 each). The marginal and internal fit of specimens were examined using a light-body silicone impression material. The thickness of light-body silicone was measured at eight reference points each, divided in the mesio distal and bucco lingual directions. All measurements were conducted by a stereomicroscope. Digital photos were taken at 150× magnification and then analyzed using a measurement software. The Kruskal-Wallis test and Bonferroni correction were used for analyzing the results. Results: The mean(SD) is ㎛ for fabrication methods, the mean marginal fit were recorded respectively, DMLS 39(27), followed by CWC 63(38), MM 220(128). and the mean internal fit CWC 95(47), DMLS 116(49), MM 210(152). In addition, the largest gap was found in the occlusal surface area among the internal measurement areas of all groups. Conclusion: As a result, the direct metal laser sintering method showed better marginal and internal fit than the metal milling method. The marginal and internal fit were statistically different according to the three fabrication methods(p<0.001). Except the MM group, the marginal fit of the CWC and DMLS groups was below the clinical standard of 120 ㎛. Based on the results of this study, it can be applied to clinical use in the future.

• 대한전자공학회논문지
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• 제27권3호
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• pp.108-115
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• 1990

고속 퓨리어변화(Fast Fourier Transform)연산용 2차원 시스토릭 어레이의 기본 구성요소인 단위 처리요소(Unit processing element)를 직접회로로 설계, 제작하고 제작된 칩을 평가하였다. 설계된 칩은 FFT 연산을 위한 데이타셔플링 기능과 반쪽 버터플라이 연산기능을 수행한다. 약 6,500여개의 트랜지스터로 구성된 이 칩은 표준셀 방식으로 설계되었으며, 2미크론 이중 금속 P-Well CMOS 공정으로 제작되었다. 제작된 칩을 웨이퍼 상태로 프로브카드를 이용하여 평가하였으며 그 결과, 20MHz 클럭 주파수에서 반쪽 버터플라이 연산이 0.5${\mu}sec$에 수행됨을 확인하였다. 본 논문에서 설계, 제작된 칩을 이용하여 1024-point FFT를 연산하는 경우 11.2${\mu}sec$의 시간이 소요될 것으로 예상된다.

• 수산해양기술연구
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• 제41권4호
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• pp.306-315
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• 2005

The distribution and composition of marine floating debris were recorded from a training ship 'Kyeongyang' of Gangwon Provincial University at May 19-29, 2004 and Aug.24-31, 2004. The sampled area is the middle part of East Sea of Korea(the coast of Gangwondo and region of Ulleung island and Tokdo), divided into 27 unit segments on survey areas. Debris fabrication materials were categorized with 6 items using the following; styrofoam, paper & cardboard, net & rope, vinyl & plastic, floating metal & glass, man-made or natural wood. From the investigation on May,2004, total numbers of marine floating debris in the middle part of the East Sea of Korea was 996 individuals. The No. 1 and No. 2 unit segment located at south-west region of Ulleung Island showed higher density than others. The styrofoam and vinyl & plastic accounted for 72.8% of all debris fabrication materials. From the investigation on August, 2004, total numbers of marine floating debris in the coast of the Gangwondo of Korea was 2,473 individuals. The No. 13 and No. 14 unit segment located at the vicinity of Samcheok showed higher density than others. The styrofoam and vinyl & plastic amounted to 76.1%. In the coast of the Gangwondo, the vinyl & plastic showed the highest density of 6 items were 41.3% and 68.0% on May and August, respectively. The total numbers of marine floating debris on May and August were 3,399 individuals. Vinyl & plastic accounted for 59.4%(2,019 ind.) among all debris, next styrofoam 15.8%(537 ind.) and wood 11.2%(379 ind.).

• 한국신재생에너지학회:학술대회논문집
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• 한국신재생에너지학회 2010년도 춘계학술대회 초록집
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• pp.138.2-138.2
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• 2010

Scandium-doped zirconium, ScSZ-based electrolyte, provides higher oxygen conductivity than YSZ and nano-based electrolyte materials are ideal for fabricating thin film electrolyte membrane of SOFC unit cell. Moreover, it may be applied to anode and cathode as well as electrolyte as ionic conductor. In this report, nano-based ScSZ-based electrolyte powder was prepared by co-precipitation synthesis. The particle size, surface area and morphology of the powder were observed by SEM and BET. Thin film electrolyte of under $10{\mu}m$ was fabricated by tape casting and co-firing using the synthesized ScSZ-based powders, and ionic conductivity and gas permeability of electrolyte film were evaluated. Finally, the SOFC unit cell was fabricated using the anode-supported electrolyte prepared by a tape casting method and co-sintering. Electrochemical evaluations of the SOFC unit cell, including measurements such as power density and impedance, were performed and analyzed.

• ETRI Journal
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• 제31권6호
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• pp.695-702
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• 2009

We propose a lens-drive unit composed of an ionic polymer-metal composite (IPMC) for an auto-focus compact camera module in cellular phones to solve the power consumption problem of voice coil motors which are widely used in commercial products. In this research, an IPMC incorporated into a lens-drive unit is designed to implement a large displacement in low-power consumption by using an anisotropic plasma treatment. Experimental results show that a camera module containing IPMCs can control and maintain the position of the lens by using proportional integral derivative control with a photo-reflective position sensor despite the non-linear actuation behavior of IPMCs. We demonstrate that the fabrication and commercialization of a lens actuator that has a large displacement and low power consumption using IPMCs is possible in the near future.

• Progress in Superconductivity
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• 제8권2호
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• pp.181-185
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• 2007

For more than two decades Nb trilayer ($Nb/Al_2O_3/Nb$) process has been serving as the most stable fabrication process of the Josephson junction integrated circuits. Fast development of semiconductor fabrication technology has been possible with the recent advancement of the fabrication equipments. In this work, we took an advantage of advanced fabrication equipments in developing a superconducting Arithmetic Logic Unit (ALU) by using Nb trilayers. The ALU is a core element of a computer processor that performs arithmetic and logic operations on the operands in computer instruction words. We used DC magnetron sputtering technique for metal depositions and RF sputtering technique for $SiO_2$ depositions. Various dry etching techniques were used to define the Josephson junction areas and film pattering processes. Our Nb films were stress free and showed the $T{_c}'s$ of about 9 K. To enhance the step coverage of Nb films we used reverse bias powered DC magnetron sputtering technique. The fabricated 1-bit, 2-bit, and 4-bit ALU circuits were tested at a few kilo-hertz clock frequency as well as a few tens giga-hertz clock frequency, respectively. Our 1-bit ALU operated correctly at up to 40 GHz clock frequency, and the 4-bit ALU operated at up to 5 GHz clock frequency.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2004년도 하계종합학술대회 논문집(2)
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• pp.509-512
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• 2004

This paper proposed a new solid State Relay(SSR) structure that can replace the conventional SSR as a power IC. The photodiode arrays, the main part of this structure, were designed and integrated in the same power It chip with the output parts, LDMOSFET and BJT, on a SOI substrate. The fabrication of this input part shared the same output LDMOSFET fabrication processs, except the additional deposition of Silicon nitride($Si_3N_4$) for the photo-detection part. According to LED illumination intensites and photo detecting areas, we could obtain voltage of 0.49V ${\~}$0.52V and current of 5.5uA ${\~}$ 108uA respectively from the fabricated unit photodiode. The maximum value of the voltage and the current we could obtain from the photodiode array were 3.58V and 24.4uA respectively, and the voltage was enough to operate the output LDMOSFET

• 한국소성가공학회:학술대회논문집
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• 한국소성가공학회 2004년도 춘계학술대회 논문집
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• pp.241-244
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• 2004

Microlens patterned micro-mold fabrication method for Light Guiding Plate(LGP), kernel part of LCD-BLU(Back Light Unit), was presented. Instead of erosion dot pattern for LCP optical design, microlens pattern, fabricated by LIGA-reflow process, was applied. Optical pattern design method was also developed not only for negative pattern LGP, but also positive pattern LGP. In order to achieve flow balance during the micro-injection molding process and dimensional accuracy, two LGP pattern was made in one micro-mold.

• 대한전자공학회논문지
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• 제26권11호
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• pp.1706-1711
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• 1989

Unit processes for the fabrication of HEMT(high electron mobility transistor)was studied and the optimum conditions of them were applied to the fabrifcation of a discrete HEMT device. The HEMT with a nominal gate-source spacing of 3.6\ulcorner and a gate length of 2.8\ulcorner showed a transconductance of 46.1mS/mm and a threshold voltage of -0.29V. A source-drain voltage of 2.0V for a saturation current of 35mA/mm was achieved.

• 한국초전도저온공학회:학술대회논문집
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• 한국초전도저온공학회 2003년도 학술대회 논문집
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• pp.92-94
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• 2003

In superconductive digital logic circuits, D2 cells can be used to compose a decoder an important component of an Arithmetic Logic Unit (ALU). In this wor, we simulated D2 cell by using WRspice. D2 cell has one input, one switch input, and two outputs (output1 and output2). D2 cell functions in such way that output1 follows the input and output2 is the complement of the input data, when the switch input is "0, ". However, when there is a switch input "1, " the opposite output signals are generated. In this paper, we optimized a D2 cell by using WRspice, and obtained the minimum margin of 26%. Our optimized D2 cell will play a key role in the ALU fabrication.the ALU fabrication.