• Title/Summary/Keyword: Ultra-high

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Influence of Sustaining Frequency on the luminous Efficiency in AC-PDP (교류형 플라즈마 디스플레이에 있어서 유지방전 주파수에 따른 발광 효율에 미치는 영향)

  • 정의선;김대일
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.14 no.6
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    • pp.1-5
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    • 2000
  • Recently alternating-current Plasma Display Panel(AC-PDP) is in the spotlight as a digital television and high definition television. The panel structure widely adapted in commercial AC-PDP is three electrodes surface discharge type. At present time, the luminous efficiency is around 1lm/W, it should be a key factor for the commercialization. For the high luminous efficiency, the development of panel structure is necessary. At a given panel structure, a driving method should be optimized to get a sufficient luminous efficiency. The display image of AC-PDP could be realized by the repeated light emission from the discharge. Because most of discharge power is consumed in the sustaining period, the optimization of sustaining waveform is very important for the high luminous efficiency. ADS (Address and Display period Separated) driving method is commonly used. The average driving frequency of ADS driving method is ranged by several tens kilo of [kHz], however the actual frequency of sustaining period is in range of 100[kHz] to 200[kHz]. Based on this study, when the phosphor emits the visible light, it has a decay time of few milliseconds due to the material transfer to the phosphor to emit the visible light. Consequently the luminous efficiency decreases in proportion to the driving frequency. It is found that the luminous efficiency could be significantly improved by the low frequency sustaining driving method.

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Laser crystallization in active-matrix display backplane manufacturing

  • Turk, Brandon A.;Herbst, Ludolf;Simon, Frank;Fechner, Burkhard;Paetzel, Rainer
    • 한국정보디스플레이학회:학술대회논문집
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    • 2008.10a
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    • pp.1261-1262
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    • 2008
  • Laser-based crystallization techniques are ideally-suited for forming high-quality crystalline Si films on active-matrix display backplanes, because the highly-localized energy deposition allows for transformation of the as-deposited a-Si without damaging high-temperature-intolerant glass and plastic substrates. However, certain significant and non-trivial attributes must be satisfied for a particular method and implementation to be considered manufacturing-worthy. The crystallization process step must yield a Si microstructure that permits fabrication of thin-film transistors with sufficient uniformity and performance for the intended application and, the realization and implementation of the method must meet specific requirements of viability, robustness and economy in order to be accepted in mass production environments. In recent years, Low Temperature Polycrystalline Silicon (LTPS) has demonstrated its advantages through successful implementation in the application spaces that include highly-integrated active-matrix liquid-crystal displays (AMLCDs), cost competitive AMLCDs, and most recently, active-matrix organic light-emitting diode displays (AMOLEDs). In the mobile display market segment, LTPS continues to gain market share, as consumers demand mobile devices with higher display performance, longer battery life and reduced form factor. LTPS-based mobile displays have clearly demonstrated significant advantages in this regard. While the benefits of LTPS for mobile phones are well recognized, other mobile electronic applications such as portable multimedia players, tablet computers, ultra-mobile personal computers and notebook computers also stand to benefit from the performance and potential cost advantages offered by LTPS. Recently, significant efforts have been made to enable robust and cost-effective LTPS backplane manufacturing for AMOLED displays. The majority of the technical focus has been placed on ensuring the formation of extremely uniform poly-Si films. Although current commercially available AMOLED displays are aimed primarily at mobile applications, it is expected that continued development of the technology will soon lead to larger display sizes. Since LTPS backplanes are essentially required for AMOLED displays, LTPS manufacturing technology must be ready to scale the high degree of uniformity beyond the small and medium displays sizes. It is imperative for the manufacturers of LTPS crystallization equipment to ensure that the widespread adoption of the technology is not hindered by limitations of performance, uniformity or display size. In our presentation, we plan to present the state of the art in light sources and beam delivery systems used in high-volume manufacturing laser crystallization equipment. We will show that excimer-laser-based crystallization technologies are currently meeting the stringent requirements of AMOLED display fabrication, and are well positioned to meet the future demands for manufacturing these displays as well.

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A Study on the Ultra Small Size 25 Watt High Power Amplifier for Satellite Mobile Communications System at L-Band (L-band 위성통신 시스템을 위한 극소형 25 Watt 고출력증폭기에 관한 연구)

  • Jeon, Joong-Sung;Ye, Byeong-Duck;Kim, Dong-Il
    • Journal of Navigation and Port Research
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    • v.26 no.1
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    • pp.22-27
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    • 2002
  • The 25 Watt hybrid MIC SSPA has been developed in the frequency rang from 1.6265 GHz to 1.6465 GHz for uplink of INMARST's earth station. To simplify the fabrication process, the whole system is designed of two parts composed of a friving amplifier and a power amplifier. The Motorolas MRF-6401 is used for driving part, the Motorolas MRF-16006 and MRF-16030 is used the power amplifier. We reduced weight and volume of high power amplifier through arranging the bias circuits in the same housing. The realized SSPA has more than 30 dB for gain within 20 MHz bandwidth, and the voltage standing wave ratios(VSWR) of input and output port are less than 1.7, respectively. The output power of 44 dBm is achieved at the 1 dB gain compression point of 106365 GHz These results reveal a high power amplifier of 25 Watt which is the design target. The Proposed SSPA manufacture techniques in this paper can be applied to the implementation of high power amplifiers for some radars and SCPC.

High-Resolution X-Ray Photoelectron Spectroscopy Study of a Sb2Te3 Thin Film with the Polycrystalline Phase (고해상도 엑스선 광전자 분광법을 이용한 다결정구조의 안티몬-테레니움 박막 연구)

  • Lee, Y.M.;Kim, K.;Shin, H.J.;Jung, M.C.;Qi, Y.
    • Journal of the Korean Vacuum Society
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    • v.21 no.6
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    • pp.348-353
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    • 2012
  • We investigated chemical states of a $Sb_2Te_3$ thin film with the polycrystalline phase by using high-resolution x-ray photoelectron spectroscopy with synchrotron radiation. The $Sb_2Te_3$ thin film was formed by sputtering. The rhombohedral phase was confirmed by x-ray diffraction. To remove the surface oxide, we performed $Ne^+$ ion sputtering for 1 hour with the beam energy of 1 kV and post-annealing at $100^{\circ}C$ for 5 min in ultra-high vacuum. We obtained the Te and Sb 4d core-levels spectra with the peaks at the binding energies of 40.4 and 33.0 eV, respectively. The full-width of half maximum of both the Te and Sb $4d_{5/2}$ core-levels is 0.9 eV. The Te and Sb core-levels only show a single chemical state, and we also confirmed the stoichiometry of approximately 2 : 3.

Hardware Design of In-loop Filter for High Performance HEVC Encoder (고성능 HEVC 부호기를 위한 루프 내 필터 하드웨어 설계)

  • Park, Seungyong;Im, Junseong;Ryoo, Kwangki
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.20 no.2
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    • pp.335-342
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    • 2016
  • This paper proposes efficient hardware structure of in-loop filter for a high-performance HEVC (High Efficiency Video Coding) encoder. HEVC uses in-loop filter consisting of deblocking filter and SAO (Sample Adaptive Offset) to improve the picture quality in a reconstructed image due to a quantization error. However, in-loop filter causes an increase in complexity due to the additional encoder and decoder operations. A proposed in-loop filter is implemented as a three-stage pipeline to perform the deblocking filtering and SAO operation with a reduced number of cycles. The proposed deblocking filter is also implemented as a six-stage pipeline to improve efficiency and performs a new filtering order for efficient memory architecture. The proposed SAO processes six pixels parallelly at a time to reduce execution cycles. The proposed in-loop filter encoder architecture is designed by Verilog HDL, and implemented by 131K logic gates in TSMC $0.13{\mu}m$ process. At 164MHz, the proposed in-loop filter encoder can support 4K Ultra HD video encoding at 60fps in real time.

Changes in Quality of Low Salt Fermented Anchovy by High Hydrostatic Pressure Treatment (초고압처리에 의한 저염 멸치젓의 품질 변화)

  • Lim, Sang-Bin;Yang, Moon-Sik;Kim, Soo-Hyun;Mok, Chul-Kyoon;Woo, Gun-Jo
    • Korean Journal of Food Science and Technology
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    • v.32 no.1
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    • pp.111-116
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    • 2000
  • Effects of ultra-high pressure treatment on viable cell count and quality characteristics of low salt fermented anchovy under different operating conditions such as pressure$(200{\sim}500\;MPa)$, temperature$(20{\sim}50^{\circ}C)$ and treatment time$(5{\sim}20\;min)$ were investigated. Viable cell count decreased gradually with the increase of pressure and suddenly at 400 MPa. It also decreased by seven folds at $50^{\circ}C$ and logarithmically with the increase of treatment time. Peroxide value increased with the increase of pressure, temperature and treatment time, and temperature played a major role. Thiobarbituric acid value was higher by two folds in samples treated than in the untreated regardless of any conditions investigated. Volatile basic nitrogen was almost the same in all samples except the one at $50^{\circ}C$. The sample treated at greater than $30^{\circ}C$ under high hydrostatic pressure indicated higher value in amino nitrogen. Treatment at $20^{\circ}C/300$ MPa/15 min showed greater reductions in viable cell counts, remaining better quality of low salt fermented anchovy.

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Implementation and Performance Evaluation of a Precision Localizing Device for Hyperloop Pods Driving at Ulta-High Speeds (초고속주행 하이퍼루프 포드의 정밀 위치측정 장치 구현 및 성능평가)

  • Ok, Min-Hwan;Choi, Su-Yong;Choe, Jae-Heon;Lee, Kwan-Sup
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.13 no.5
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    • pp.443-451
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    • 2020
  • A futuristic locomotion system called Hyperloop is projected for driving at ulta-high speed, levitated in the tube. In hyperloop localization of pods on the linear synchronous motor is essential for pod driving. precision localization is required for acceleration and deceleration of pods driving at speed above 1,000km/h, and also required for adjusting the pod speed driving at this very-high speed to maintain inter-vehicle distance. In this work, a new scale of localization is challenged by modified laser surface velocimeter. In acceleration the speed of a virtual pod is calculated along its displacement measured by laser reflection. Under the requirement of precise localization of the pod driving at ultra-high speed, a displacement measurement device, which detects the difference in reflections from tiles passing by the pod, is developed and evaluated through performance test. Tests of pod speeds below 500km/h have showed exact localization results of the precision in centimeters, and tests of pod speeds above 500km/h have showed localization with very low error rates under 0.1%. For the measurement above 500km/h, future works would pursue the error rate converges to zero.

Quality Changes during Storage of Low Salt Fermented Anchovy treated with High Hydrostatic Pressure (초고압 처리한 멸치젓의 저장 중 품질 변화)

  • Lim, Sang-Bin;Jwa, Mi-Kyung;Mok, Chul-Kyoon;Woo, Gun-Jo
    • Korean Journal of Food Science and Technology
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    • v.32 no.2
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    • pp.373-379
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    • 2000
  • Low salt fermented anchovy was stored at $25^{\circ}C$ for a period of 20 days from the time of ultra-high pressure treatment under different operating conditions, such as magnitude of pressure($(200{\sim}500\;MPa)$, temperature$(20{\sim}50^{\circ}C)$ and treatment time$(5{\sim}20\;min)$ with viable cell count(VCC) and quality assessments conducted at regular intervals. VCC decreased logarithmically during storage. Lower values of VCC in the treated samples were observed compared to the untreated. A gradual increase in peroxide value was noticed during storage, compared to those of the untreated which showed a sudden rise. Thiobarbituric acid value decreased initially and remained at that level before rising almost exponentially between 12 and 20 days. Volatile basic nitrogen increased gradually during storage. Amino nitrogen remained almost constant up to 20 days, regardless of any conditions investigated. High pressure treatment maintained better quality during storage at $25^{\circ}C$ by reducing the viable cell count in low salt fermented anchovy.

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The Hardware Design of Effective Deblocking Filter for HEVC Encoder (HEVC 부호기를 위한 효율적인 디블록킹 하드웨어 설계)

  • Park, Jae-Ha;Park, Seung-yong;Ryoo, Kwang-ki
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2014.10a
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    • pp.755-758
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    • 2014
  • In this paper, we propose effective Deblocking Filter hardware architecture for High Efficiency Video Coding encoder. we propose Deblocking Filter hardware architecture with less processing time, filter ordering for low area design, effective memory architecture and four-pipeline for a high performance HEVC(High Efficiency Video Coding) encoder. Proposed filter ordering can be used to reduce delay according to preprocessing. It can be used for realtime single-port SRAM read and write. it can be used in parallel processing by using two filters. Using 10 memory is effective for solving the hazard caused by a single-port SRAM. Also the proposed filter can be used in low-voltage design by using clock gating architecture in 4-pipeline. The proposed Deblocking Filter encoder architecture is designed by Verilog HDL, and implemented by 100k logic gates in TSMC $0.18{\mu}m$ process. At 150MHz, the proposed Deblocking Filter encoder can support 4K Ultra HD video encoding at 30fps, and can be operated at a maximum speed of 200MHz.

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Development trends of Solar cell technologies for Small satellite (소형위성용 태양전지 개발 동향 및 발전 방향)

  • Choi, Jun Hee
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.22 no.5
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    • pp.310-316
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    • 2021
  • Conventional satellites are generally large satellites that are multi-functional and have high performance. However, small satellites have been gradually drawing attention since the recent development of lightweight and integrated electric, electronic, and optical technologies. As the size and weight of a satellite decrease, the barrier to satellite development is becoming lower due to the cost of manufacture and cheaper launch. However, solar panels are essential for the power supply of satellites but have limitations in miniaturization and weight reduction because they require a large surface area to be efficiently exposed to sunlight. Space solar cells must be manufactured in consideration of various space environments such as spacecraft and environments with solar thermal temperatures. It is necessary to study structural materials for lightweight and high-efficiency solar cells by applying an unfolding mechanism that optimizes the surface-to-volume ratio. Currently, most products are developed and operated as solar cell panels for space applications with a triple-junction structure of InGaP/GaAs/Ge materials for high efficiency. Furthermore, multi-layered junctions have been studied for ultra-high-efficiency solar cells. Flexible thin-film solar cells and organic-inorganic hybrid solar cells are advantageous for material weight reduction and are attracting attention as next-generation solar cells for small satellites.