• Proceedings of the KIEE Conference
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• 2005.11b
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• pp.261-263
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• 2005

In the extra and ultra high voltage system, the coupling capacitor voltage transformer (CCVT) measures the primary voltage with a small scale of voltage transformer (VT). However, the CCVT generates errors caused by the hysteresis characteristics of iron core and by the ferroresonance, inevitably. This paper proposes a compensation algorithm for the secondary voltage of a CCVT considering the hysteresis characteristics of an iron core. The proposed algorithm calculates the seconda교 current of a VT by summing the current flowing the ferroresonance circuit and the burden current; it estimates the secondary voltage of a VT; then the core flux is calculated by integrating of the secondary voltage of a VT, then estimates the exciting current using ${\lambda}-i$ characteristic of the core. The method calculates a primary voltage of a VT considering the estimated primary current. Finally, the correct voltage is estimated by compensating the voltage across the inductor and capacitor. The performance of the proposed algorithm was tested in a 345kV transmission system. The test results show that the proposed method can improve the accuracy of the seconda교 voltage of a CCVT.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.8
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• pp.285-291
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• 2013

In this paper, MOS-Capacitor and MOSFET devices with a Low Level Leakage Current of oxide thickness, channel width and length respectively were to investigate the reliability characterizations mechanism of ultra thin gate oxide films. These stress induced leakage current means leakage current caused by stress voltage. The low level leakage current in stress and transient current of thin silicon oxide films during and after low voltage has been studied from strss bias condition respectively. The stress channel currents through an oxide measured during application of constant gate voltage and the transient channel currents through the oxide measured after application of constant gate voltage. The study have been the determination of the physical processes taking place in the oxides during the low level leakage current in stress and transient current by stress bias and the use of the knowledge of the physical processes for driving operation reliability.

• Journal of Electrochemical Science and Technology
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• v.8 no.3
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• pp.250-256
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• 2017

A graphene electrode with a novel in-plane structure is proposed and successfully adopted for use in supercapacitor applications. The in-plane structure allows electrolyte ions to interact with all the graphene layers in the electrode, thereby maximizing the utilization of the electrochemical surface area. This novel structure contrasts with the conventional out-of-plane stacked structure of such supercapacitors. We herein compare the volumetric capacitances of in-plane- and out-of-plane-structured devices with reduced multi-layer graphene oxide films as electrodes. The in-plane-structured device exhibits a capacitance 2.5 times higher (i.e., $327F\;cm^{-3}$) than that of the out-of-plane-structured device, in addition to an energy density of $11.4mWh\;cm^{-3}$, which is higher than that of lithium-ion thin-film batteries and is the highest among in-plane-structured ultra-small graphene-based supercapacitors reported to date. Therefore, this study demonstrates the potential of in-plane-structured supercapacitors with high volumetric performances as ultra-small energy storage devices.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.08a
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• pp.255-255
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• 2010

Recently, nonvolatile memories (NVM) of various types have been researched to improve the electrical performance such as program/erase voltages, speed and retention times. Also, the charge trap memory is a strong candidate to realize the ultra dense 20-nm scale NVM. Furthermore, the high charge efficiency and the thermal stability of SiC nanocrystals NVM with single $SiO_2$ tunnel barrier have been reported. [1-2] In this study, the SiC charge trap NVM was fabricated and electrical properties were characterized. The 100-nm thick Poly-Si layer was deposited to confined source/drain region by using low-pressure chemical vapor deposition (LP-CVD). After etching and lithography process for fabricate the gate region, the $Si_3N_4/SiO_2/Si_3N_4$ (NON) and $SiO_2/Si_3N_4/SiO_2$ (ONO) barrier engineered tunnel layer were deposited by using LP-CVD. The equivalent oxide thickness of NON and ONO tunnel layer are 5.2 nm and 5.6 nm, respectively. By using ultra-high vacuum magnetron sputtering with base pressure 3x10-10 Torr, the 2-nm SiC and 20-nm $SiO_2$ were successively deposited on ONO and NON tunnel layers. Finally, after deposited 200-nm thick Al layer, the source, drain and gate areas were defined by using reactive-ion etching and photolithography. The lengths of squire gate are $2\;{\mu}m$, $5\;{\mu}m$ and $10\;{\mu}m$. The electrical properties of devices were measured by using a HP 4156A precision semiconductor parameter analyzer, E4980A LCR capacitor meter and an Agilent 81104A pulse pattern generator system. The electrical characteristics such as the memory effect, program/erase speeds, operation voltages, and retention time of SiC charge trap memory device with barrier engineered tunnel layer will be discussed.

• Journal of the Korean Society of Industry Convergence
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• v.1 no.1
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• pp.31-41
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• 1998

Fuel conservation and environmental pollution control are the principal motivating factors that are urging at present widespread research and development activities for electric hybrid vehicles throughout the world. The paper describes different possible energy storage devices, such as battery, flywheel and ultra capacitor, and power sources, such as gasoline engine, diesel engine, gas turbine and fuel cell for next generation hybrid electric vehicle. The technology trend and comparison in energy storage and power devices indicate that battery and gasoline engine, respectively will remain the most viable devices for hybrid vehicle at least in the near future.

• ETRI Journal
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• v.32 no.2
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• pp.265-272
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• 2010

To supply a power distribution network with stable power in a high-speed mixed mode system, simultaneous switching noise caused at the multilayer PCB and package structures needs to be sufficiently suppressed. The uni-planar compact electromagnetic bandgap (UC-EBG) structure is well known as a promising solution to suppress the power noise and isolate noise-sensitive analog/RF circuits from a noisy digital circuit. However, a typical UC-EBG structure has several severe problems, such as a limitation in the stop band's lower cutoff frequency and signal quality degradation. To make up for the defects of a conventional EBG structure, a partially located EBG structure with decoupling capacitors is proposed in this paper as a means of both suppressing the power noise propagation and minimizing the effects of the perforated reference plane on the signal quality. The proposed structure is validated and investigated through simulation and measurement in both frequency and time domains.

• 한국신재생에너지학회:학술대회논문집
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• 2005.06a
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• pp.361-365
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• 2005

Since the fuel cell uses the hydrogen for its fuel. it has no emission and higher efficiency than an internal combustion engine. Also fuel cell is much quieter than engine generator and generates heat much less than engine generator. So it has advantage of Army's 'si lent watch' capability and the ability to operate undetected by the enemy. The fuel cell hybrid system combines a fuel cell power system with an ESS. The ESS (e.g., batteries or ultracapacitors) reduces the fuel cell's peak power and transient response requirements. It allows the fuel cell to operate more efficiently and recovery of vehicle energy during deceleration. The battery has high energy density, so it has the advantage regarding driving distance. However, it has a disadvantage considering dynamic characteristic because of low power density. One other hand. the ultracapacitor has higher power density, so it can handle sudden change or discharge of required power. Yet. it has lower energy density. so it will be bigger and heavier than the battery when it has the same energy. This paper proposes the power management strategy for multi-power source fuel cell hybrid system. which is applied with the merits of both battery and ultra capacitor by using both of them simultaneous.

• Proceedings of the KIPE Conference
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• 2017.11a
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• pp.115-116
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• 2017

본 논문에서는 넓은 전압범위를 갖는 울트라 커패시터용 충전기를 제안한다. 제안된 컨버터는 넓은 충전 전압범위를 만족하기 위하여 Cascade 부스트-벅 구조로 하였으며 상용화 된 하이브리드 SiC 기반 3레그 IPM을 최적으로 사용하기 위해 2상 인터리빙 부스트 컨버터와 단상 벅 컨버터로 하였다. 또한 승 강압 모드에 따라 스위칭 하는 스위치 소자 개수를 감소시켜 스위칭 손실을 최소화 하였다. 본 논문에서는 시스템에서 제안하는 울트라커패시터 충전기의 타당성을 검증하기 위해 한셀이 100F의 정전용량과 2.8V의 정격 전압을 갖고 150개 직렬(0.67F, 420V) 연결된 울트라 커패시터를 이용하여 실험을 진행하였다.

• Journal of Electrical Engineering and Technology
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• v.10 no.2
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• pp.574-585
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• 2015

This paper aims to improve the performance of conventional direct torque control (DTC) drives proposed by Takahashi by extending the idea for 5-level inverter. Hybrid cascaded H-bridge topology is used to achieve inverter voltage vector composed of 5-level of voltage. Although DTC is very popular for its simplicity but it suffers from some disadvantages like- high torque ripple and uncontrollable switching frequency. To compensate these shortcomings conventional DTC strategy is modified for five levels voltage source inverter (VSI). Multilevel hysteresis controller for both flux and torque is used. Optimal voltage vector selection from precise lookup table utilizing 12 sector, 9 torque level and 4 flux level is proposed to improve DTC performance. These voltage references are produced utilizing a hybrid cascaded H-bridge multilevel inverter, where inverter each phase can be realized using multiple dc source. Fuel cells, car batteries or ultra-capacitor are normally the choice of required dc source. Simulation results shows that the DTC drive performance is considerably improved in terms of lower torque and flux ripple and less THD. These have been experimentally evaluated and compared with the basic DTC developed by Takahashi.

• ETRI Journal
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• v.31 no.3
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• pp.254-262
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• 2009

This paper presents a novel simple filter design method based on a parallel short-ended coupled-line structure with capacitive loading for size reduction and ultra-broad rejection of spurious passbands. In addition, the introduction of a cross-coupling capacitor into the miniaturized coupled-line can create a transmission zero at the second harmonic frequency for better frequency selectivity and attenuation level. The aperture compensation technique is also applied to achieve a strong coupling in the coupled-line section. The influence of using the connecting transmission line to cascade two identical one-stage filters is studied for the first time. Specifically, such a two-stage bandpass filter operating at 2.3 GHz with a fractional bandwidth of 10% was designed and realized with low-temperature co-fired ceramic technology for application in base stations that need high power handling capability. It achieved attenuation in excess of -40 dB up to $4f_0$ and low insertion loss of -1.2 dB with the size of 10 mm ${\times}$ 7 mm ${\times}$ 2.2 mm. The measured and simulated results showed good agreement.