• Title/Summary/Keyword: USB Memory

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Design of the Flash Memory for Image/voice Recorder (화상ㆍ음성 레코더를 위한 플래쉬 메모리 설계)

  • 신필순;김동현;곽윤식;김백기;신재룡
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2001.10a
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    • pp.567-570
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    • 2001
  • In this paper, we proposed flash memory design method for image and voice recoder based on the standard imageㆍvoice codec algorithm. For implementation of this method we designed image voice browser which is application system of flash memory and card using GDS30C6001 USB controller. To process image and voice data we designed root directory of image and voice files repectively. To extend application of image and voice data we added various information to the system.

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Integral TS Demultiplexer of Memory Sharing based DVB-T/T-DMB Receiver (메모리공유 기반의 DVB-T/T-DMB 통합 TS의 역다중화기)

  • Kwon, Ki-Won;Paik, Jong-Ho;Kang, Min-Goo
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.10 no.6
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    • pp.17-22
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    • 2010
  • In this paper, integral TS(Transport Stream) demultiplexer of a multi-modal receiver is proposed according to the multiple standards of European terrestrial digital broadcasting DVB-T(Digital Video Broadcasting Terrestrial), and mobile terrestrial digital broadcasting T-DMB(Terrestrial Digital Multimedia Broadcasting). This USB based integral receiver could recover the multi-modal broadcasting audios by memory sharing technique which was utilized to decrease the load by the control of streaming multi-modal broadcasting. As a result of performance analysis for a proposed integral TS demultiplexer, the CPU occupational efficiency of windows based integral demulitiplexing is improved compared with DVB-T, and T-DMB respectively.

Reconfigurable Integrated Flash Memory Software Architecture with FAT Compatibility (재구성 가능한 FAT 호환 통합 플래시 메모리 소프트웨어 구조)

  • Kim, Yu-Mi;Choi, Yong-Suk;Baek, Seung-Jae;Choi, Jong-Moo
    • Journal of KIISE:Computing Practices and Letters
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    • v.16 no.1
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    • pp.17-22
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    • 2010
  • As deployments of Flash memory are spreading out rapidly from tiny USB storages to large DB servers, interoperability become an indispensable requirement for Flash memory software architecture. For the purpose, many systems make use of the conventional FAT file system and FTL (Flash Translation Layer) software as a de facto standard. However, the tactless combination of the FAT file system and FTL does not satisfy diverse other requirements of a variety of systems. In this paper, we propose a novel reconfigurable integrated Flash memory software architecture, named INFLAWARE (INtegrated FLAsh softWARE) that supports not only interoperability but also reconfigurability and performance enhancement. Real implementation based experimental results have shown that INFLAWARE can achieve improvements of memory footprint up to 27% with an average of 19%, compared with the conventional FAT and FTL combination. Also, by using map_destroy technique, it can reduce response times of various applications up to 21% with an average of 10%.

A study on Multiple External Storage Configuration for the Android based Set-top Box System (안드로이드 기반 셋톱박스의 다중 외장 저장장치에 관한 연구)

  • Han, Kyung-Sik;Kim, In-Ki;Kim, Byung-Jun;Sonh, Seung-Il;Kang, Min-Goo
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2013.05a
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    • pp.653-655
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    • 2013
  • This paper is the study of Multiple External Storage Configuration for the Android based Set-top Box system. Because of Mobile OS, Android has limitation in media streaming, recording and playing for Set-top box function with only support external storage device Micro-SD card. In this paper, we research for the Multiple External Storage configuration for external disk drive, USB Memory, SD card. in Android System with Multi-Volume Management system implementation.

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Secure Deletion for Flash Memory File System (플래시메모리 파일시스템을 위한 안전한 파일 삭제 기법)

  • Sun, Kyoung-Moon;Choi, Jong-Moo;Lee, Dong-Hee;Noh, Sam-H.
    • Journal of KIISE:Computing Practices and Letters
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    • v.13 no.6
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    • pp.422-426
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    • 2007
  • Personal mobile devices equipped with non-volatile storage such as MP3 player, PMP, cellular phone, and USB memory require safety for the stored data on the devices. One of the safety requirements is secure deletion, which is removing stored data completely so that the data can not be restored illegally. In this paper, we study how to design the secure deletion on Flash memory, commonly used as storage media for mobile devices. We consider two possible secure deletion policy, named zero-overwrite and garbage-collection respectively, and analyze how each policy affects the performance of Flash memory file systems. Then, we propose an adaptive file deletion scheme that exploits the merits of the two possible policies. Specifically, the proposed scheme applies the zero-overwrite policy for small files, whereas it employs the garbage-collection policy for large files. Real implementation experiments show that the scheme is not only secure but also efficient.

Development of Language Study Machine Using Voice Recognition Technology (음성인식 기술을 이용한 대화식 언어 학습기 개발)

  • Yoo, Jae-Tack;Yoon, Tae-Seob
    • Proceedings of the KIEE Conference
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    • 2005.10b
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    • pp.201-203
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    • 2005
  • The best method to study language is to talking with a native speaker. A voice recognition technology can be used to develope a language study machine. SD(Speaker dependant) and SI(speaker independant) voice recognition method is used for the language study machine. MP3 Player. FM Radio. Alarm clock functions are added to enhance the value of the product. The machine is designed with a DSP(Digital Signal Processing) chip for voice recognition. MP3 encoder/decoder chip. FM tumer and SD flash memory card. This paper deals with the application of SD ad SD voice recognition. flash memory file system. PC download function using USB ports, English conversation text function by the use of SD flash memory. LCD display control. MP3 encoding and decoding, etc. The study contents are saved in SD flash memory. This machine can be helpful from child to adult by changing the SD flash memory.

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Design of MTP memory IP using vertical PIP capacitor (Vertical PIP 커패시터를 이용한 MTP 메모리 IP 설계)

  • Kim, Young-Hee;Cha, Jae-Han;Jin, Hongzhou;Lee, Do-Gyu;Ha, Pan-Bong;Park, Mu-Hun
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.13 no.1
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    • pp.48-57
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    • 2020
  • MCU used in applications such as wireless chargers and USB type-C require MTP memory with a small cell size and a small additional process mask. Conventional double poly EEPROM cells are small in size, but additional processing masks of about 3 to 5 sheets are required, and FN tunneling type single poly EEPROM cells have a large cell size. In this paper, a 110nm MTP cell using a vertical PIP capacitor is proposed. The erase operation of the proposed MTP cell uses FN tunneling between FG and EG, and the program operation uses CHEI injection method, which reduces the MTP cell size to 1.09㎛2 by sharing the PW of the MTP cell array. Meanwhile, MTP memory IP required for applications such as USB type-C needs to operate over a wide voltage range of 2.5V to 5.5V. However, the pumping current of the VPP charge pump is the lowest when the VCC voltage is the minimum 2.5V, while the ripple voltage is large when the VCC voltage is 5.5V. Therefore, in this paper, the VPP ripple voltage is reduced to within 0.19V through SPICE simulation because the pumping current is suppressed to 474.6㎂ even when VCC is increased by controlling the number of charge pumps turned on by using the VCC detector circuit.

Developement of Small 360° Oral Scanner Embedded Board for Image Processing (소형 360° 구강 스캐너 영상처리용 임베디드 보드 개발)

  • Ko, Tae-Young;Lee, Sun-Gu;Lee, Seung-Ho
    • Journal of IKEEE
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    • v.22 no.4
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    • pp.1214-1217
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    • 2018
  • In this paper, we propose the development of a Small $360^{\circ}$ Oral Scanner embedded board. The proposed small $360^{\circ}$ oral scanner embedded board consists of image level and transfer method changing part FPGA part, memory part and FIFO to USB transfer part. The image level and transmission mode change unit divides the MIPI format oral image received through the small $360^{\circ}$ oral cavity image sensor and the image sensor into low power signal mode and high speed signal mode and distributes them to the port and transfers the level shift to the FPGA unit. The FPGA unit performs functions such as $360^{\circ}$ image distortion correction, image correction, image processing, and image compression. In the FIFO to USB transfer section, the RAW data transferred through the FIFO in the FPGA is transferred to the PC using USB 3.0, USB 3.1, etc. using the transceiver chip. In order to evaluate the efficiency of the proposed small $360^{\circ}$ oral scanner embedded board, it has been tested by an authorized testing institute. As a result, the frame rate per second is over 60 fps and the data transfer rate is 4.99 Gb/second

FPGA Design and SoC Implementation of Constant-Amplitude Multicode Bi-Orthogonal Modulation (정진폭 다중 부호 이진 직교 변복조기의 FPGA 설계 및 SoC 구현)

  • Hong, Dae-Ki;Kim, Yong-Seong;Kim, Sun-Hee;Cho, Jin-Woong;Kang, Sung-Jin
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.32 no.11C
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    • pp.1102-1110
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    • 2007
  • In this paper, we design the FPGA (Field-Programmable Gate Array) of the CAMB (Constant-Amplitude Multi-code Biorthogonal) modulation, and implement the SoC (System on Chip). The ASIC (Application Specific Integrated Circuit) chip is be implemented through targeting and board test. This 12Mbps modem SoC includes the ARM (Advanced RISC Machine)7TDMI, 64Kbyte SRAM(Static Random Access Memory) and ADC (Analog to Digital Converter)/DAC (Digital to Analog Converter) for flexible applications. Additionally, the modem SoC can support the variable communication interfaces such as the 16-bits PCMCIA (Personal Computer Memory Card International Association), USB (Universal Serial Bus) 1.1, and 16C550 Compatible UART (Universal Asynchronous Receiver/Transmitter).

A MAC System Design for High-speed UWB SoC (고속 UWB SoC의 MAC 시스템 설계)

  • Kim, Do-Hoon;Wee, Jeong-Wook;Lee, Chung-Yong
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.48 no.4
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    • pp.1-5
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    • 2011
  • We present the implementation of MAC system for MBOA UWB SoC. The implemented MBOA MAC algorithm is not master control mechanism, but distributed network mechanism. Therefore, mesh network can be easily constructed because MAC consists of distributed network and administrates network. The ARM926EJ with cache is adopted for high performnace and AMBA bus is applied for system design and reuse. In addition, the system operating clock management algorithm is implemented for low power consumption. The dedicated DMA for MAC is designed between the system memory buffer and MAC hardware, and the dedicated DMA for USB 2.0 is also implemented between system memory buffer and host for high data transaction.