• JSTS:Journal of Semiconductor Technology and Science
• /
• 제14권4호
• /
• pp.463-470
• /
• 2014

A Verilog model is proposed for transmission lines to perform the all-Verilog simulation of high-speed chip-to-chip interface system, which reduces the simulation time by around 770 times compared to the mixed-mode simulation. The single-pulse response of transmission line in SPICE model is converted into that in Verilog model by converting the full-scale analog signal into an 11-bit digital code after uniform time sampling. The receiver waveform of transmission line is calculated by adding or subtracting the single-pulse response in Verilog model depending on the transmitting digital code values with appropriate time delay. The application of this work to a USB 2.0 high-speed PHY interface reduces the simulation time to less than three minutes with error less than 5% while the mixed-mode simulation takes more than two days for the same circuit.

• 대한전자공학회논문지SD
• /
• 제42권5호
• /
• pp.31-38
• /
• 2005

본 논문에서는, UTMI호환 USB2.0 PHY 칩의 구조와 세부 설계 내용 전반에 대하여 기술하였다. 노이즈 채널 환경에서, 수신데이터의 유효성을 판단하기 위한 방법으로 squelch 상태 검출 회로 및 전류모드 슈미트-트리거 회로를 설계하였으며, 레플리카 바이어스 회로를 사용한 온칩 종단(ODT) 회로와, 480Mbps 데이터 송신을 위한 전류모드 차동 출력 구동회로를 설계하였다. 또한, 플레시오크로너스 클럭킹 방식을 사용하는 USB 시스템에서, 송수신단 사이의 주파수 차이를 보상하기 위하여, 클럭데이터 복원회로와 FIFO를 사용한 동기화 회로를 설계하였다. 네트웍 분석기를 이용한 손실전송선(W-model) 모델 파라미터를 측정을 통해 추출하였으며, 설계를 위한 시뮬레이션 과정에 활용하였다. 설계된 칩은 0.25um CMOS 공정으로 제작하였으며, 이에 대한 측정 결과를 제시하였다. IO패드를 제외한 칩의 코어 면적은 $0.91{\times}1.82mm^2$ 이었고, 2.5V 전원전압에서 전체 전력소모량은, 480MHz 동작 시 245mW, 12MHz 동작 시 150mW로 시뮬레이션 되었다.

• Journal of information and communication convergence engineering
• /
• 제11권1호
• /
• pp.7-11
• /
• 2013

Wearable computer systems use the wireless universal serial bus (WUSB), which refers to USB technology that is merged with WiMedia physical layer and medium access control layer (PHY/MAC) technical specifications. WUSB can be applied to wireless personal area network (WPAN) applications as well as wired USB applications such as PAN. WUSB specifications have defined high-speed connections between a WUSB host and WUSB devices for compatibility with USB 2.0 specifications. In this paper, we focus on an integrated system with a WUSB over an IEEE 802.15.6 wireless body area network (WBAN) for wireless wearable computer systems. Due to the portable and wearable nature of wearable computer systems, the WUSB over IEEE 802.15.6 hierarchical medium access control (MAC) protocol has to support power saving operations and integrate WUSB transactions with WBAN traffic efficiently. In this paper, we propose a low-power hibernation technique (LHT) for WUSB over IEEE 802.15.6 hierarchical MAC to improve its energy efficiency. Simulation results show that the LHT also integrates WUSB transactions and WBAN traffic efficiently while it achieves high energy efficiency.