• Journal of Broadcast Engineering
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• v.22 no.6
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• pp.829-849
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• 2017

Due to the large-scale TV display, the convergence of broadcasting and broadband, and the advancement of signal compression and transmission technology, terrestrial digital broadcasting has evolved into UHD broadcasting capable of providing simultaneous broadcasting of fixed UHD and mobile HD. The Korean standard for terrestrial UHDTV broadcasting is based on ATSC 3.0, the broadcasting standard of North America. The terrestrial UHDTV broadcasting standard chose that as a new AV codec standard, HEVC video codec which can compress with higher efficiency compared to AVC, and MPEG-H 3D audio codec for realistic audio. Also, DASH and MMT are adopted as transmission format instead of MPEG-2 TS to support broadband as well as broadcasting network, and in order to provide 4K UHD/mobile HD service simultaneously ROUTE multiplexing technology is applied. In this paper, we propose an audio/video encoder, which is required to provide HDR/WCG supported high quality video service, 10.2 channel/4 object supporting stereo sound service, fixed UHD and mobile HD simultaneous broadcasting service based on ATSC3.0, also we implemented the ATSC 3.0 LDM system for ROUTE/DASH packager, multiplexing system and physical layer transmission/reception, and verified the service ability by applying it to real time broadcast environment.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.6
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• pp.145-155
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• 2013

In this paper, we proposed a $4{\times}4$ block parallel architecture of interpolation for high-performance H.264/AVC Fractional Motion Estimation in 8K UHD($7680{\times}4320$) video real time processing. To improve throughput, we design $4{\times}4$ block parallel interpolation. For supplying the $10{\times}10$ reference data for interpolation, we design 2D cache buffer which consists of the $10{\times}10$ memory arrays. We minimize redundant storage of the reference pixel by applying the Search Area Stripe Reuse scheme(SASR), and implement high-speed plane interpolator with 3-stage pipeline(Horizontal Vertical 1/2 interpolation, Diagonal 1/2 interpolation, 1/4 interpolation). The proposed architecture was simulated in 0.13um standard cell library. The gate count is 436.5Kgates. The proposed H.264/AVC Fractional Motion Estimation can support 8K UHD at 30 frames per second by running at 187MHz.

• Broadcasting and Media Magazine
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• v.23 no.2
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• pp.33-42
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• 2018

본 고에서는 2018년 평창 동계올림픽/페럴림픽에서 ATSC 3.0 표준기반 4K-UHD / 모바일 HD 서비스 제공을 위해서 그 동안 KBS에서 추진한 시설구축 현황 및 필드테스트 진행 결과에 대해 살펴본다.

• Broadcasting and Media Magazine
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• v.21 no.1
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• pp.70-77
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• 2016

단순히 해상도만을 향상시킨 UHDTV를 넘어서 더욱 고화질의 4K UHDTV를 서비스하고자 HDR/WCG/HFR의 기능을 부가한 고실감 UHD 영상 기술에 대한 연구 개발이 세계적으로 열띤 경쟁 속에 진행되고 있다. 이에 본 고에서는 현재 현업 콘텐츠 제작자들이 활용 가능한 기기들을 중심으로 HDR/WCG/HFR 4K UHD 영상 기술 및 장비의 동향에 대하여 간략히 정리해 보고자 한다.

• Journal of KIISE
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• v.43 no.9
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• pp.1060-1065
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• 2016

Recently, there is an emerging need for parallel UHD video processing, and the usage of computing systems that have an asymmetric processor such as ARM big.LITTLE is actively increasing. Thus, a new parallel UHD video processing method that is optimized for the asymmetric multicore systems is needed. This paper proposes a novel HEVC tile partitioning method for parallel processing by analyzing the computational power of asymmetric multicores. The proposed method analyzes (1) the computing power of asymmetric multicores and (2) the regression model of computational complexity per video resolution. Finally, the model (3) determines the optimal HEVC tile resolution for each core and partitions/allocates the tiles to suitable cores. The proposed method minimizes the gap in the decoding time between the fastest CPU core and the slowest CPU core. Experimental results with the 4K UHD official test sequences show average 20% improvement in the decoding speedup on the ARM asymmetric multicore system.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2015.11a
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• pp.149-151
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• 2015

본 논문에서는 4K UHD 입력 영상에 대해 각 프레임을 다중 슬라이스로 분할하고, 이를 병렬 처리를 통해 실시간으로 부호화를 수행하는 소프트웨어 기반 HEVC 인코더의 율 제어 방법에 관한 연구이다. 이를 위하여 HEVC 가 지원하는 슬라이스를 적용하여 프레임을 독립적인 다중 슬라이스로 분할하였고, 각각의 슬라이스에 대해서는 기존에 제안된 몇 가지의 율 제어 방법을 개선하여 적용하였다. 본 논문에서는 다중 슬라이스에 각각 독립적으로 적용한 율 제어 방법에 대한 실험 결과를 통해 제안된 율 제어 방법의 안정성을 확인하고, 향후 연구로서 각 슬라이스의 출력 비트율을 예측하고 다중 슬라이스에 효과적으로 할당하는 방법과 이를 통한 주관적 화질을 향상 하는 방법에 대해 논한다.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2015.07a
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• pp.484-485
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• 2015

세계적인 디지털 방송 전환과 더불어 방송 기술의 비약적인 발전은 HD(High Definition) 방송 시대를 넘어 UHD(Ultra High Definition) 방송 시대를 개막하였으며, UHD를 비롯한 다양한 차세대 방송 기술들이 개발되고 있다. 이러한 변화에 따라 차세대 방송 기술의 선점을 위한 유럽의 DVB 2.0, 미국의 ATSC 3.0, 일본의 ISDB-Tmm과 같은 최신의 방송 표준이 제정되 거나 제정을 준비하고 있다. 국내의 차세대 방송 원천 기술에 대한 연구 개발이 어느 때보다도 시급한 상황이다. 본 논문은 방송 통신 융합환경 하에서 초고화질 콘텐츠를 전송할 수 있도록 하는 차세대 융합방송 프로젝트의 일환으로 유럽의 차세대 디지털 방송 시스템에 적용된 MPLP 기법을 분석하고, 해당 기법을 적용하여 지상파 방송망을 통해서 HD 및 4K UHD 서비스를 다중화하여 변조시스템에 전송하는 다중화 시스템의 구조를 제안한다.

• Broadcasting and Media Magazine
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• v.21 no.4
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• pp.100-107
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• 2016

• International Journal of Advanced Culture Technology
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• v.10 no.4
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• pp.226-227
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• 2022

The most dangerous and safest place, the busiest and most serene place, the DMZ where the wounds of the bitter war melt away, but at the same time contain life and healing. In this space of paradox, we now want to look at 'peace'. The KTV documentary 'DMZ Coexistence' is made in the form of a human road documentary that consists of various perspectives looking at the DMZ, various characters, and the most unknown Korean story materials, and the stories related to the performers in UHD 4K. In this study, we will show the process of creating an 'opening title' of 'DMZ Coexistence' captured in 4k and make it usable in academia and industry in the future.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.5
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• pp.102-111
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• 2013

In this paper, we proposed a $4{\times}4$ block parallel architecture of interpolation for high-performance H.264/AVC Motion Compensation in 4K UHD($3840{\times}2160$) video real time processing. To improve throughput, we design $4{\times}4$ block parallel interpolation. For supplying the $9{\times}9$ reference data for interpolation, we design 2D cache buffer which consists of the $9{\times}9$ memory arrays. We minimize redundant storage of the reference pixel by applying the Search Area Stripe Reuse scheme(SASR), and implement high-speed plane interpolator with 3-stage pipeline(Horizontal Vertical 1/2 interpolation, Diagonal 1/2 interpolation, 1/4 interpolation). The proposed architecture was simulated in 0.13um standard cell library. The maximum operation frequency is 150MHz. The gate count is 161Kgates. The proposed H.264/AVC Motion Compensation can support 4K UHD at 72 frames per second by running at 150MHz.