• Journal of the Korea Academia-Industrial cooperation Society
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• v.17 no.5
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• pp.717-722
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• 2016

In this paper, in order to support the peak current limiting function depending on the intensity of the fault current at the early stage of failure, a two magnetically coupled type superconducting fault current limiter (SFCL) is proposed, which includes high-Tc superconducting (HTSC) element 1, where the existing primary and secondary coils are connected to one iron core in parallel, and HTSC element 2, which is connected to the tertiary winding using an additional iron core. The results of the experiments in this study confirmed that the two magnetic coupling type SFCL having coil 1 and coil 2 connected in parallel using dual iron cores is capable of having only HTSC element 1 support the burden of the peak current when a failure occurs. The reason for this is that although HTSC element 1 was quenched and malfunctioned because the instantaneous factor of the initial fault current was large, the current flowing to coil 3 did not exceed the critical current, which would otherwise cause HTSC element 2 to be quenched and not function. In order to limit the peak current upon fault through the sequential HTSC elements, the design should allow it to have the same value as the low value of coil 1 while having coil 3 possess a higher self-inductance value than coil 2. In addition, a short-circuit simulation experiment was conducted to examine and validate the current limiting and recovery characteristics of the SFCL when the winding ratio between coil 1 and coil 2 was 0.25. Through the analysis of the short-circuit tests, the current limiting and recovery characteristics in the case of the additive polarity winding was confirmed to be superior to that of the subtractive polarity winding.

• Journal of IKEEE
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• v.12 no.3
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• pp.176-183
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• 2008

The high efficiency power management IC(PMIC) with DTMOS(Dynamic Threshold voltage MOSFET) switching device is proposed in this paper. PMIC is controlled with PWM control method in order to have high power efficiency at high current level. DTMOS with low on-resistance is designed to decrease conduction loss. The control parts in Buck converter, that is, PWM control circuits consist of a saw-tooth generator, a band-gap reference circuit, an error amplifier and a comparator circuit as a block. The Saw-tooth generator is made to have 1.2 MHz oscillation frequency and full range of output swing from ground to supply voltage(VDD:3.3V). The comparator is designed with two stage OP amplifier. And the error amplifier has 70dB DC gain and $64^{\circ}$ phase margin. DC-DC converter, based on Voltage-mode PWM control circuits and low on-resistance switching device, achieved the high efficiency near 95% at 100mA output current. And DC-DC converter is designed with LDO in stand-by mode which fewer than 1mA for high efficiency.

• Journal of Astronomy and Space Sciences
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• v.24 no.4
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• pp.349-366
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• 2007

We designed and developed a multi-purpose CCD camera system for three kinds of CCDs; KAF-0401E($768{\times}512$), KAF-1602E($1536{\times}1024$), KAF-3200E($2184{\times}1472$) made by KODAK Co.. The system supports fast USB port as well as parallel port for data I/O and control signal. The packing is based on two stage circuit boards for size reduction and contains built-in filter wheel. Basic hardware components include clock pattern circuit, A/D conversion circuit, CCD data flow control circuit, and CCD temperature control unit. The CCD temperature can be controlled with accuracy of approximately $0.4^{\circ}C$ in the max. range of temperature, ${\Delta}33^{\circ}C$. This CCD camera system has with readout noise $6\;e^-$, and system gain $5\;e^-/ADU$. A total of 10 CCD camera systems were produced and our tests show that all of them show passable performance.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.2 no.4
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• pp.635-641
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• 1998

This paper presents development of a small size LNA operating at 824 ∼ 849 MHz used for a receiver of a CELLULAR CDMA Base station and a transponder. Using resistive decoupling circuits, a signal at low frequency is dissipated by a resistor. This design method increases the stability of the LNA and is suitable for input stage matching. The LNA consists of low noise GaAs FET ATF-10136 and internally matched VNA-25. The LNA is fabricated with both the RF circuit and the self-bias circuits in aluminum housing. As a result, the characteristics of the LNA implemented here shows above 35dB in gain and below 0.9dB in noise figure, 18.6dBm P1dB power, a typical two tone IM3, -31.17dB with single carrier backed off 10dB from P1dB.

• Transactions of the Korean Society of Mechanical Engineers
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• v.16 no.11
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• pp.2196-2202
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• 1992

The optimum size combination of heat exchangers in a Joule-Thomson(J-T) circuit for small cryogenic systems has been sought analytically, when the circuit is combined with a two-stage Gifford-McMahon(GM) cooler. Full thermodynamic cycle analysis was carried out to predict the performance of the combined refrigeration system. Relevant convective heat transfer coefficients, the computerized properties of helium, and the refrigeration capacity curve of a typical GM cooler have been used in the analysis. The result showed that, by changing the configuration(heat exchanger area ratio) of the system, the performance of the commonly-used GM/J-T refrigerators could be optimized. For the maximum refrigeration performance, the optimum mass flow rate of the refrigerant and the relative size between the heat exchangers have been obtained, when the cooling load was 0.1W at 3.995K with the total heat exchanger area being given.

• Korean Journal of Optics and Photonics
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• v.18 no.6
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• pp.447-451
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• 2007

A triplexer based on a silica planar lightwave circuit Mach-Zehnder nterferometer(MZI) is proposed and its characteristics are analyzed through simulations. To separate 1310 nm band and $1480{\sim}1560nm$ band properly, the path length difference of an MZI is set to be the multiple and half of the wavelength 1310 nm and the balance of the directional coupler is optimized in the $1480{\sim}1560nm$ band. The same MZI is additionally cascaded to provide good crosstalk characteristics. The 1490 nm band and 1550 nm band are further separated using additional two stage MZI's. A three-dimensional BPM and transfer matrix method analysis predicts the low crosstalk characteristics and the fabrication-error-tolerance of the proposed triplexer.

• The Transactions of the Korean Institute of Power Electronics
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• v.10 no.4
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• pp.313-322
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• 2005

In this paper, High power factor electronic ballast using a double resonant Inverter for 250[W] MHD lamp is designed and implemented. Proposed electronic ballast is composed of configuration that is cascaded boost active PFC circuit as power factor corrector and half-bridge double resonant inverter Into two stage approach. Theoretical analysis of circuit and characteristics estimation is generally illustrated by using normalized parameter. To remove the phenomenon of acoustic resonance in the lamp, Simple frequency controller composed timer IC and driving IC is designed and employed on the ballast. The experimental results show that an high power factor electronic ballast using a double resonant inverter is operated stably.

• Journal of IKEEE
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• v.22 no.4
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• pp.985-991
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• 2018

In this paper, an equivalent circuit reflecting the internal loss of the LLC resonant half bridge converter was proposed and a steady state characteristic equation including the loss factors was derived. Using the results, the frequency characteristics of I/O voltage gain and input impedance were compared with the lossless model In order to verify the proposed model and the derived equation, the main components of the 1kW class LLC resonant half bridge converter were selected under the same conditions and the steady state characteristics such as voltage gain and input impedance were compared. In particular, to compare more closely the steady state error of the two models, we observed the change in switching frequency with respect to the load current, which is considered to be the most important in the actual circuit design stage. As a result, it is confirmed that the error of the operating frequency is significantly improved from the proposed model and the analysis result.

• Journal of IKEEE
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• v.26 no.4
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• pp.584-589
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• 2022

For DC-AC power conversion from a high-voltage photovoltaic panel to a single-phase grid, the two-stage transformerless inverter with a buck-boost converter followed by a full-bridge inverter is widely used. To avoid an excessive leakage current due to the large parasitic capacitance of the photovoltaic panel, the full-bridge inverter can only adopt the bipolar PWM which results in much higher power loss compared to the unipolar PWM. In order to overcome such a poor efficiency, this paper proposes a new topology in which an IGBT and a diode for circuit isolation are added to the buck-boost converter. The proposed circuit isolation method allows the unipolar PWM in the full-bridge inverter without any increase in the leakage current so that the overall efficiency can be improved. The validity of the proposed solution is verified by computer simulation and power loss calculation.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2006.05a
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• pp.259-262
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• 2006

This paper presents a design of low power CMOS LNA(Low Noise Amplifier) for 2.4 GHz ZigBee applications. The proposed circuit has been designed by using TSMC $0.18{\mu}m$ CMOS process and current-reused two-stage cascade topology. LNA design procedures and the simulation results using ADS(Advanced Design System) are presented in this paper. Simulation results shows that the LNA has a extremely low power dissipation of 1.38mW with a $V_{DD}$ of 1.0V. The LNA also has a maximum gain of 13.38dB, input return loss of -20.37dB, output return loss of -22.48dB and noise figure of 1.13dB.