• Journal of Industrial Technology
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• v.32 no.A
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• pp.39-45
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• 2012

In this paper the digital control scheme of interleaved PFC for 3-phase modular UPS is presented. The interleaved PFC is composed of two identical PFC connected in parallel and each PFC is controlled by the interleaved switching signals which have the same switching frequency and the $180^{\circ}$ phase difference. As a consequence of the interleaving operation, the Interleaved PFC exhibits both lower current ripple at the input side and lower voltage ripple at the outside. Therefore, the switching and conduction losses as well as EMI levels can be significantly decreased. Simulation and experimental results verify the usefulness of the interleaved PFC.

• The Transactions of the Korean Institute of Power Electronics
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• v.25 no.6
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• pp.484-489
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• 2020

This study proposes a new soft-switching three-level flying capacitor converter with low filter inductance. The proposed converter can achieve zero voltage switching (ZVS) turn-on of all switches by using auxiliary components La and Ca. It can also reduce filter inductance because the applied voltage of the filter inductor is decreased by using the flying capacitor. Furthermore, filter inductance can be reduced because the operating frequency of the filter inductor is doubled by the phase shifting between switches S3 and S4. The operation principle, design of passive components for ZVS turn-on, interleaving effects, and comparison of different topologies are presented. The experimental waveforms of a 1 kW two-phase interleaved converter prototype are provided to verify the validity of the proposed converter.

• Journal of Power Electronics
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• v.10 no.6
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• pp.673-679
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• 2010

Input-series-output-parallel (ISOP) connected DC-DC converters enable low voltage rating switches to be used in high voltage input applications. In this paper, a DSP is adopted to generate digital phase-shifted PWM signals and to fulfill the closed-loop control function for ISOP connected two full-bridge DC-DC converters. Moreover, a stable output current sharing control strategy is proposed for the system, with which equal sharing of the input voltage and the load current can be achieved without any input voltage control loops. Based on small signal analysis with the state space average method, a loop gain design with the proposed scheme is made. Compared with the conventional IVS scheme, the proposed strategy leads to simplification of the output voltage regulator design and better static and dynamic responses. The effectiveness of the proposed control strategy is verified by the simulation and experimental results of an ISOP system made up of two full-bridge DC-DC converters.

• Proceedings of the KIPE Conference
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• 2012.07a
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• pp.195-196
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• 2012

In recent years, in an effort to improve the efficiency and the power density of the front-end power factor correction(PFC), the interleaving of multiple converter is employed. The conventional interleaved continuous conduction mode(CCM) boost PFC converter requires input and output voltage sensing and three current sensing to obtain current balancing between modules. In this paper, the interleaved CCM PFC converter based on modulated carrier control is proposed. With the proposed method, two phase interleaved PFC can be realized simply without line voltage sensing resistor and can achieve current balancing without additional current sensing resistor on common return path. The simulation studies are carried out to verify the effectiveness of the proposed control scheme.

• Journal of Power Electronics
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• v.18 no.4
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• pp.1211-1222
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• 2018

This study presents a power distribution control scheme for a three-phase interleaved parallel DC/DC converter in a battery energy storage system. To extend battery life and increase the power equalization rate, a control method based on the nth order of the state of charge (SoC) is proposed for the charging and discharging processes. In the discharging process, the battery sets with high SoC deliver more power, whereas those with low SoC deliver less power. Therefore, the SoC between each battery set gradually decreases. However, in the two-stage charging process, the battery sets with high SoC absorb less power, and thus, a power correction algorithm is proposed to prevent the power of each particular battery set from exceeding its rated power. In the simulation performed with MATLAB/Simulink, results show that the proposed scheme can rapidly and effectively control the power distribution of the battery sets in the charging and discharging processes.

• Journal of the Institute of Electronics and Information Engineers
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• v.54 no.5
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• pp.24-32
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• 2017

In this paper, a low power 4th order delta-sigma modulator was designed with a high resolution of 12 bits or more for the biological signal processing. Using time-interleaving technique, 4th order delta-sigma modulator was designed with one operational amplifier. So power consumption can be reduced to 1/4 than a conventional structure. To operate stably in the big difference between the two capacitor for kT/C noise and chip size, the variable-stage amplifier was designed. In the first phase and second phase, the operational amplifier is operating in a 2-stage. In the third and fourth phase, the operational amplifier is operating in a 1-stage. This was significantly improved the stability of the modulator because the phase margin exists within 60~90deg. The proposed delta-sigma modulator is designed in a standard $0.18{\mu}m$ CMOS n-well 1 poly 6 Metal technology and dissipates the power of $354{\mu}W$ with supply voltage of 1.8V. The ENOB of 11.8bit and SNDR of 72.8dB at 250Hz input frequency and 256kHz sampling frequency. From measurement results FOM1 is calculated to 49.6pJ/step and FOM2 is calculated to 154.5dB.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.39C no.2
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• pp.199-208
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• 2014

Code division multiple access (CDMA) is one of the promising medium access control (MAC) schemes for underwater acoustic sensor networks because of its robustness against frequency-selective fading and high frequency-reuse efficiency. As a way of performance evaluation, sea or lake experiment has been employed along with computer simulation.. In this study, we design the underwater CDMA forward-link transceiver and evaluate the feasibility aginst harsh underwater acoustic channel in water-tank first. Then, based on the water-tank experiment results, we improved the transceiver and showed the improvements in a lake experiment. A pseudo random noise code acquisition process is added for phase error correction before decoding the user data by means of a Walsh code in the receiver. Interleaving and convolutional channel coding scheme are also used for performance improvement. Experimental results show that the multiplexed data is recovered by means of demultiplexing at receivers with error-free in case of two users while with less than 15% bit error rate in case of three and four users.

• Journal of the Mineralogical Society of Korea
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• v.15 no.3
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• pp.221-230
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• 2002

Weathering of biotite shows a biotite-vermiculite-kaolinite sequence at the early stage, but presents biotite-kaolinite sequence without a significant intermediate phase (vermiculite) at the late stage from the weathering profile of the granitic gneiss. Secondary 1:1 phyllosilicates are kaolinite and halloysite which show different weathering textures originated by a different formation mechanism. Kaolinitization began from the edges of biotite and propagated toward the interior of grain along a multilayered front. $10 \AA$ layers of biotite are interleaving with $7\AA$ layers of kaolinite and c-axis of two phases is consistent. Kaolinite pseudomorph of biotite is isovolumetric, compared to the biotite boundary and includes many band-like porosities parallel to the cleavage. Platy kaolinite formed by 1:1 layer fur layer replacement of biotite. Halloysitization proceeded outward from the grain edges which were foliated as fine flakes and bent at the right angle for cleavage Halloysites were extensively fanning out and greatly increased the volume of grain. This indicated that halloysite tubes were formed by epitaxial overgrowth on the surface of biotite with import of Si and Al from the external solution by dissolution of plagioclase. These halloysites have abnormally high Fe content ( ~11%).