• Journal of Power Electronics
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• 제12권2호
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• pp.258-267
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• 2012

An interleaved single-stage AC/DC converter with a boost converter and an asymmetrical half-bridge topology is presented to achieve power factor correction, zero voltage switching (ZVS) and load voltage regulation. Asymmetric pulse-width modulation (PWM) is adopted to achieve ZVS turn-on for all of the switches and to increase circuit efficiency. Two ZVS half-bridge converters with interleaved PWM are connected in parallel to reduce the ripple current at input and output sides, to control the output voltage at a desired value and to achieve load current sharing. A center-tapped rectifier is adopted at the secondary side of the transformers to achieve full-wave rectification. The boost converter is operated in discontinuous conduction mode (DCM) to automatically draw a sinusoidal line current from an AC source with a high power factor and a low current distortion. Finally, a 240W converter with the proposed topology has been implemented to verify the performance and feasibility of the proposed converter.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2018년도 전력전자학술대회
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• pp.432-433
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• 2018

A new DC-DC converter circuit for LVDC(Low Voltage Direct-Current) distribution is proposed. DC-DC converter consists of two stage which are voltage balancer and converter stage. The balancing circuit adjust balance input voltage of converter circuit and compensate for unbalanced loads and short circuits. The converter circuit control the bipolar output voltage ${\pm}750V$. Simulation is carried out for this DC-DC converter system.

• Journal of Power Electronics
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• 제6권3호
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• pp.271-278
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• 2006

A new high efficiency zero-voltage and zero-current switching (ZVZCS) bidirectional DC/DC converter is proposed in this paper. The proposed converter consists of two symmetric half-bridge cells as the input and output stages. MOSFETs of input stage are turned-on in ZVS condition, and those of output stage are turned-off in ZCS condition. In addition, MOSFETs of input and output stages have low voltage stresses clamped to input and output voltage, respectively. Therefore, the proposed converter has high efficiency and high power density. The operational principles are analyzed and the advantages of the proposed converter are described. The 300W prototype of the proposed converter is implemented for 42V hybrid electric vehicle (HEV) application in order to verify the operational principles and advantages.

• 대한전기학회논문지:시스템및제어부문D
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• 제54권3호
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• pp.186-190
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• 2005

In this paper, the pipelined A/D converter with multi S/H stage structure is proposed for high resolution and high-speed data conversion rate. In order to improve a resolution and operational speed, the proposed structure increased the sampling time that is sampled input signal. In order to verify the operation characteristics, 20MS/s pipelined A/D converter is designed with two S/H stage. The simulation result shows that INL and DNL are $0.52LSB\~-0.63LSB$ and $0.53LSB\~-0.56LSB$, respectively. Also, the designed Analog-to-Digital converter has the SNR of 43dB and power consumption is 18.5mW.

• 조명전기설비학회논문지
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• 제28권11호
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• pp.84-92
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• 2014

In this paper, we propose a three-phase isolated electrolytic capacitorless charger available for quick charger. In the proposed charger, electrolytic capacitor in DC link is eliminated by direct conversion from AC input to DC output. Conventional chargers are two stage structure including AC-DC and DC-DC converters, but the proposed charger can be simplified into single stage converter by using a matrix converter. And the waveform of input currents is improved by giving the weighting factor to the duty ratio of auxiliary switches. In order to verify the effectiveness of the proposed charger, simulations are carried out and a 1.2kW charger was constructed and experimented.

• 한국전기전자재료학회논문지
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• 제21권5호
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• pp.421-425
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• 2008

In this research, a 8-bit CMOS 2 stage folding A/D converter is designed, For low power consumption and small chip size, the A/D converter is designed by using folding and interpolation circuit. Folding circuit is composed of the transistor differential pairs which are connected in parallel. It reduces the number of comparator drastically. The analog block composed of folding block, current interpolation circuit, and three stage current comparator is designed with differential-mode for high speed operation. The simulation in a $0.35\;{\mu}m$ CMOS process. shows DNL and SNDR of 0.5LSB and 47 dB at 250 MHz/s sampling frequency.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2003년도 춘계전력전자학술대회 논문집(1)
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• pp.352-357
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• 2003

A new single stage power factor correction(PFC) AC/DC converter based on zero voltage switching(ZVS) full bridge topology is proposed. Since the series-connected two transformers act as both output inductor and main transformer by turns, the proposed converter has a wide ZVS range without additional devices for ZVS. Furthermore, since there is no need to use an output inductor, the proposed converter features high power density. The proposed converter gives the good power factor correction and low line current harmonics distortion. A mode analysis and experiment results are presented to verify the validity of the proposed converter.

• 한국조명전기설비학회:학술대회논문집
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• 한국조명전기설비학회 2007년도 춘계학술대회 논문집
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• pp.187-192
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• 2007

The terminal voltage of a synchronous generator is maintained by the field current control of excitation system Generally AC/DC converter which is component of AVR(Automatic Voltage Regulator) system for excitation current control is connected to diode rectifier and DC/DC converter system In the case of diode rectifier system of phase controlled converter, AC/DC converter has low power factor and some low order harmonics in the line current. In this paper, two-stage three-phase PWM AC/DC converter is studied to solve these problems, The proposed method is verified by the computer simulations and experimental results in prototype generation system.

• 전력전자학회:학술대회논문집
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• 전력전자학회 1998년도 Proceedings ICPE 98 1998 International Conference on Power Electronics
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• pp.694-700
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• 1998

A novel zero-voltage-transition (ZVT) isolated PWM boost converter for single stage power factor correction (PFC) is presented to improve the performance of the previously presented ZVT converter[8]. A simple auxiliary circuit which includes only one active switch provides zero-voltage-switching (ZVS) condition to all semiconductor devices. (Two active switches are required for the previous ZVT converter) This leads to reduced cost and simplified control circuit comparing to the previous ZVT converter. The ZVS is achieved for wide line and load ranges with minimum device voltage and current stresses. Operation principle, control strategy and features of the proposed converter are presented and verified by the experimental results from a 1.5 kW, 100 KHz laboratory prototype.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2009년도 정기총회 및 추계학술대회 논문집
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• pp.206-208
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• 2009

In this paper, a systematical controller design method for a twostage grid-connected photovoltaic power conditioning system is proposed. For a pre-stage boost converter to achieve the stable operation in the entire region of solar array, the digital resistive current mode controller is used. This algorithm is very simple to implement with a digital controller and there is no power stage parameter dependency in the controller design. For a post-stage single-phase full-bridge inverter, a PI controller with a feedforward compensation for the inner current control is employed. Furthermore, in case that the operating point of the solar array under varying environmental conditions is higher than the required voltage for the inverter current control, the bypass mode for the boost converter is possible for the more efficient operation. The proposed control scheme is validated through the experiment of the prototype two-stage power conditioning system hardware with a 200W solar array.