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Pipelined A/D Converter with Multiple S/H Stage Structure  

Cho Seong-Ik (전북대학 전자정보 공학부)
Publication Information
The Transactions of the Korean Institute of Electrical Engineers D / v.54, no.3, 2005 , pp. 186-190 More about this Journal
Abstract
In this paper, the pipelined A/D converter with multi S/H stage structure is proposed for high resolution and high-speed data conversion rate. In order to improve a resolution and operational speed, the proposed structure increased the sampling time that is sampled input signal. In order to verify the operation characteristics, 20MS/s pipelined A/D converter is designed with two S/H stage. The simulation result shows that INL and DNL are $0.52LSB\~-0.63LSB$ and $0.53LSB\~-0.56LSB$, respectively. Also, the designed Analog-to-Digital converter has the SNR of 43dB and power consumption is 18.5mW.
Keywords
Pipelined ADC; ADC; S/H; multiple S/H;
Citations & Related Records
Times Cited By KSCI : 1  (Citation Analysis)
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