• 대한전기학회:학술대회논문집
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• 대한전기학회 2005년도 제36회 하계학술대회 논문집 A
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• pp.319-322
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• 2005

This paper describes practical tuning methods and testing of a digital PSS, which uses both frequency and power, with the 220MVA Chungpyung P/P #1 in the KEPCO system to enhance the damping of local modes. In the first step, the objective phase of PSS is computed through a phase leading function to provide compensation between the exciter reference point and the generator air-gap torque before tuning the PSS's time constants. In addition, eigenvalue analysis was used to determine a range of PSS's gain, whichis the more useful for field testing rather than a single gain value. The Real-Time Digital Simulator was used to verify safe operations of the PSS in the presence of disturbances, such as AVR step and three phase fault.

• JSTS:Journal of Semiconductor Technology and Science
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• 제15권4호
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• pp.437-444
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• 2015

A high output power voltage controlled oscillator (VCO) in the U-band was implemented using a 65 nm CMOS process. The proposed VCO used a transmission line to increase output voltage swing and overcome the limitations of CMOS technologies. Two varactor banks were used for fine tuning with a 5% frequency tuning range. The proposed VCO showed small variation in output voltage and operated at 51.55-54.18 GHz. The measured phase noises were -51.53 dBc/Hz, -91.84 dBc/Hz, and -101.07 dBc/Hz at offset frequencies of 10 kHz, 1 MHz, and 10 MHz, respectively, with stable output power. The chip area, including the output buffer, is $0.16{\times}0.16mm^2$ and the maximum output power was -0.11 dBm. The power consumption was 33.4 mW with a supply voltage of 1.2-V. The measured $FOM_P$ was -190.8 dBc/Hz.

• JSTS:Journal of Semiconductor Technology and Science
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• 제17권4호
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• pp.534-542
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• 2017

This paper presents a fast locking technique for a fractional-N PLL frequency synthesizer. The technique directly measures $K_{VCO}$ on a chip, computes the VCO's target tuning voltage for a given target frequency, and directly sets the loop filter voltage to the target voltage before the PLL begins the normal closed-loop locking process. The closed-loop lock time is significantly minimized because the initial frequency of the VCO are put very close to the desired final target value. The proposed technique is realized and designed for a 4.3-5.3 GHz fractional-N synthesizer in 65 nm CMOS and successfully verified through extensive simulations. The lock time is less than $12.8{\mu}s$ over the entire tuning range. Simulation verifications demonstrate that the proposed method is very effective in reducing the synthesizer lock time.

• 한국통신학회논문지
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• 제21권5호
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• pp.1304-1316
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• 1996

In this paper, A VCO(Voltage Controlled Oscillator) in use of clock recovery/data regeneration circuit for 10 Gbps fiber optic receivers was developed. The improved hair-pin resonator with a parallel coupled lines, which has been applied to microstrip filters, was used as a resonance part. As a frequcncy tuning device by substituting 3-terminalMESFET vaaractor for varactor diode, an MMIC manufacturing process will be simplified. Since a hair-pin resonator is planar type compared to the dielectric resonator and has a relatively flat reactance verus frequency, it will be favorable to apply a hair-pin resonator to an MMIC, in addition wideband frequency tuning range is able to be obtained.

• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 2003년도 춘계학술대회 논문집
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• pp.203-206
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• 2003

Thermo-optic tunable filter, with 4-pairs of H/L layers for DBR, was designed and fabricated. The transmittance characteristics of the filter were measured. Additionally, heating system and temperature sensor system were used in order to observe property of the filter by thermo-optic effect. The tuning efficiency of the filter was measured to be 0.144nm/K$^{-1}$ showing the tuning range of 9.4nm for the temperature variation of 64.7$^{\circ}C$. Filter, lens and fiber were aligned by micro-optical bench.

• 한국전자파학회:학술대회논문집
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• 한국전자파학회 2001년도 종합학술발표회 논문집 Vol.11 No.1
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• pp.257-261
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• 2001

This paper presents the implementation of wide-band RFIC amplifier operating from near 50MHz to 3GHz using Tachyonics SiGe HBT foundry. Voltage shunt feedback is used for the flat gain and the broad band impedance matching. Initial design parameters are calculated using the low frequency small signal analysis. Since the HBT model was not available at the design time, discrete tuning board was made for fine tuning in the low frequency range. Fabricated amplifier shows 12dB gain with 1dB fluctuation and PldB reaches 15dBm at 850MHz.

• 한국전기전자재료학회논문지
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• 제17권5호
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• pp.476-480
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• 2004

The characteristics of antimony implants are relatively well-known. Antimony has lower diffusion coefficient, shorter implantation range, and smaller scattering as compared with conventional dopants such as phosphorous and arsenic. It has been commonly used in the doping of buried layer in Bi-CMOS process. In this paper, characteristics and appropriate condition of monitoring in antimony implant beam tuning using Sb$_2$O$_3$were investigated to get a reliable process. TW(Thema Wave) and R$_{s}$(Sheet Resistance) test were carried out to set up condition of monitoring for stable operation through the periodic inspection of instruction condition. The monitoring was progressed at the point that the slant of R$_{s}$ varied significantly to Investigate the variation of instruction accurately.

• Journal of the Optical Society of Korea
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• 제12권3호
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• pp.157-161
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• 2008

A wavelength-selective reflector, composed of a double-ring-resonator add/drop filter and a loop-back mirror at the drop port to be used for a hybrid-integrated tunable laser is designed and fabricated. High-index-contrast polymer waveguide is used to realize a compact device as small as $2mm{\times}0.4mm$. The radii of the rings are slightly different from each other to obtain a wide wavelength tuning via a vernier effect. Peak reflectivity is measured to be 52% for TE mode and polarization-dependent wavelength shift is 0.95 nm. The tuning range is measured to be about 42 nm for applied current as small as 46 mA.

• 자동차안전학회지
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• 제7권3호
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• pp.19-24
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• 2015

Brake pads are a component of disc brake system of automobile and consist of steel backing plates and friction material facing the disk brake rotor. Due to the repeated sliding forces and torque in vehicle braking, friction performance of brake pads are ensured. Futhermore, the brake pad is one of major tuning components in aftermarket, mechanical characteristics of the brake pad are necessary to evaluate for establishing the certification standards of tuning components. This study had performed the five specimen tests for friction coefficients and wear loss rates according to the SAE test specification. Using the instrumented indentation method, yield strength and tensile strength were measured. Friction coefficients, 0.386 - 0.489, and wear loss rates, 1.0% - 3.7% are obtained. The range of yield strength and tensile strength are 21.4 MPa - 105.3 MPa and 39.5 MPa - 176.4 MPa respectively.

• Journal of Information Display
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• 제13권4호
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• pp.167-177
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• 2012

Cold cathode fluorescent lamps (CCFLs) are used to provide lighting for liquid crystal displays (LCDs). This paper presents a set of guidelines for measurement characterization and design to reduce the power consumption of CCFL LCD backlight inverters and panel electronics. The proposed methods aim to reduce the backlight power consumption by fine-tuning a back-light inverter for a specific LCD, using several methods. First, the authors describe their power measurement methodology; and next, they identify different areas for tuning a backlight inverter for a given display. The experiment results showed that power savings can range from 50 to 200mW if the backlight inverter is properly tuned. This paper also proposes an optimized configuration for light-emitting device (LED) panels to reduce power loss by selecting a LED with a specific input voltage and number of cells to help minimize power loss.