• Title/Summary/Keyword: Trench oxide

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A Latch-Up Immunized Lateral Trench IGBT with $p^{+}$ Diverter Structure for Smart Power IC (스마트 파워 IC를 위한 $p^{+}$ Diverter 구조의 횡형 트랜치 IGBT)

  • 문승현;강이구;성만영;김상식
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.14 no.7
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    • pp.546-550
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    • 2001
  • A new Lateral Trench Insulated Gate Bipolar Transistor(LTIGBT) with p$^{+}$ diverter was proposed to improve the characteristics of the conventional LTIGBT. The forward blocking voltage of the proposed LTIGBT with p$^{+}$ diverter was about 140V. That of the conventional LTIGBT of the same size was 105V. Because the p$^{+}$ diverter region of the proposed device was enclosed trench oxide layer, he electric field moved toward trench-oxide layer, and punch through breakdown of LTIGBT with p$^{+}$ diverter was occurred, lately. Therefore, the p$^{+}$ diverter of the proposed LTIGBT didn't relate to breakdown voltage in a different way the conventional LTIGBT. The Latch-up current densities of the conventional LTIGBT and proposed LTIGBT were 540A/$\textrm{cm}^2$, and 1453A/$\textrm{cm}^2$, respectively. The enhanced latch-up capability of the proposed LTIGBT was obtained through holes in the current directly reaching the cathode via the p$^{+}$ divert region and p$^{+}$ cathode layer beneath n$^{+}$ cathode layer./ cathode layer.

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A Study of SiC Trench Schottky Diode with Tilt-Implantation for Edge Termination (Edge Termination을 위해 Tilt-Implantation을 이용한 SiC Trench Schottky Diode에 대한 연구)

  • Song, Gil-Yong;Kim, Kwang-Soo
    • Journal of IKEEE
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    • v.18 no.2
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    • pp.214-219
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    • 2014
  • In this paper, the usage of tilt-implanted trench Schottky diode(TITSD) based on silicon carbide is proposed. A tilt-implanted trench termination technique modified for SiC is proposed as a method to keep all the potentials confined in the trench insulator when reverse blocking mode is operated. With the side wall doping concentration of $1{\times}10^{19}cm^{-3}$ nitrogen, the termination area of the TITSD is reduced without any sacrifice in breakdown voltage while potential is confined within insulator. When the trench depth is set to 11um and the width is optimized, a breakdown voltage of 2750V is obtained and termination area is 38.7% smaller than that of other devices which use guard rings for the same breakdown voltage. A Sentaurus device simulator is used to analyze the characteristics of the TITSD. The performance of the TITSD is compared to the conventional trench Schottky diode.

Simulation of a Novel Lateral Trench Electrode IGBT with Improved Latch-up and Forward Blocking Characteristics

  • Kang, Ey-Goo;Moon, Seung-Hyun;Kim, Sangsig;Sung, Man-Young
    • Transactions on Electrical and Electronic Materials
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    • v.2 no.1
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    • pp.32-38
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    • 2001
  • A new small sized Lateral Trench electrode Insulated Gate Bipolar Transistor(LTEIGBT) was proposed to improve the characteristics of conventional Lateral IGBT (LIGBT) and Lateral Trench gate IGBT (LTIGBT). The entire electrode of LTEIGBT was replace with trench-type electrode. The LTEIGBT was designed so that the width of device was no more than 19 ㎛. The Latch-up current densities of LIGBT, LTIGBT and the proposed LTEIGBT were 120A/㎠, 540A/㎠, and 1230A/㎠, respectively. The enhanced latch-up capability of the LTEIGBT was obtained through holes in the current directly reaching the cathode via the p+ cathode layer underneath n+ cathode layer. The forward blocking voltage of the LTEIGBT is 130V. Conventional LIGBT and LTIGBT of the same size were no more than 60V and 100V, respectively. Because the the proposed device was constructed of trench-type electrodes, the electric field moved toward trench-oxide layer, and punch through breakdown of LTEIGBT is occurred, lately.

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Effect of slurries on the dishing of Shallow Trench Isolation structure during CMP process

  • Lee, Hoon;Lim, Dae-Soon;Lee, Sang-Ick
    • Proceedings of the Korean Society of Tribologists and Lubrication Engineers Conference
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    • 2002.10b
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    • pp.443-444
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    • 2002
  • The uniformity of field oxide is critical to isolation property of device in STI, so the control of field oxide thickness in STI-CMP becomes enormously important. The loss of field oxide in shallow trench isolation comes mainly from dishing and erosion in STI-CMP. In this paper, the effect of slurries on the dishing was investigated with both blanket and patterned wafers were selected to measure the removal rate, selectivity and dishing amount. Dishing was a strong function of pattern spacing and types of slurries. Dishing was significantly decreased with decreasing pattern spacing for both slurries. Significantly lower dishing with ceria based slurry than with silica based slurry were achieved when narrow pattern spacing were used. Possible dishing mechanism with two different slurries were discussed based on the observed experimental results.

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A Small Scaling Lateral Trench IGBT with Improved Electrical Characteristics for Smart Power IC (스마트 파워 IC를 위한 향상된 전기특성의 소규모 횡형 트랜치 IGBT)

  • 문승현;강이구;성만영
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2001.07a
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    • pp.267-270
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    • 2001
  • A new small scaling Lateral Trench Insulated Gate Bipolar Transistor (SSLTIGBT) was proposed to improve the characteristics of the device. The entire electrode of the LTIGBT was replaced with a trench-type electrode. The LTIGBT was designed so that the width of device was no more than 10$\mu\textrm{m}$. The latch-up current densities were improved by 4.5 and 7.6 times, respectively, compared to those of the same sifted conventional LTIGBT and the conventional LTIGBT which has the width of 17$\mu\textrm{m}$. The enhanced latch-up capability of the SSLTIGBT was obtained due to the fact that the hole current in the device reaches the cathode via the p+ cathode layer underneath the n+ cathode layer, directly. The forward blocking voltage of the SSLTIGBT was 125 V. At the same size, those of the conventional LTIGBT and the conventional LTIGBT with the width of 17$\mu\textrm{m}$ were 65 V and 105 V, respectively. Because the proposed device was constructed of trench-type electrodes, the electric field in the device were crowded to trench oxide. Thus, the punch through breakdown of LTEIGBT occurred late.

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A Novel Lateral Trench Electrode IGBT for Suprior Electrical Characteristics (인텔리전트 파워 IC의 구현을 위한 횡형 트렌치 전극형 IGBT의 제작 및 그 전기적 특성에 관한 연구)

  • 강이구;오대석;김대원;김대종;성만영
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.15 no.9
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    • pp.758-763
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    • 2002
  • A new small size Lateral Trench Electrode Insulated Gate Bipolar Transistor (LTEIGBT) is proposed and fabricated to improve the characteristics of device. The entire electrode of LTEIGBT is placed to trench type electrode. The LTEIGBT is designed so that the width of device is 19w. The latch-up current density of the proposed LTEIGBT is improved by 10 and 2 times with those of the conventional LIGBT and LTIGBT. The forward blocking voltage of the LTEIGBT is 130V. At the same size, those of conventional LIGBT and TIGBT are 60V and 100V, respectively. Because the electrodes of the proposed device is formed of trench type, the electric field in the device are crowded to trench oxide. When the gate voltage is applied 12V, the forward conduction currents of the proposed LTEIGBT and the conventional LIGBT are 80mA and 70mA, respectively, at the same breakdown voltage of 150V.

Extended Trench Gate Superjunction Lateral Power MOSFET for Ultra-Low Specific on-Resistance and High Breakdown Voltage

  • Cho, Doohyung;Kim, Kwangsoo
    • ETRI Journal
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    • v.36 no.5
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    • pp.829-834
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    • 2014
  • In this paper, a lateral power metal-oxide-semiconductor field-effect transistor with ultra-low specific on-resistance is proposed to be applied to a high-voltage (up to 200 V) integrated chip. The proposed structure has two characteristics. Firstly, a high level of drift doping concentration can be kept because a tilt-implanted p-drift layer assists in the full depletion of the n-drift region. Secondly, charge imbalance is avoided by an extended trench gate, which suppresses the trench corner effect occurring in the n-drift region and helps achieve a high breakdown voltage (BV). Compared to a conventional trench gate, the simulation result shows a 37.5% decrease in $R_{on.sp}$ and a 16% improvement in BV.

Analysis of Electrical Characteristics of High-Density Trench Gate Power DMOSFET Utilizing Self-Align and Hydrogen Annealing Techniques (자기 정열과 수소 어닐링 기술을 이용한 고밀도 트랜치 게이트 전력 DMOSFET의 전기적 특성 분석)

  • 박훈수;김종대;김상기;이영기
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.16 no.10
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    • pp.853-858
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    • 2003
  • In this study, a new simplified technology for fabricating high density trench gate DMOSFETs using only three mask layers and TEOS/nitride spacer is proposed. Due to the reduced masking steps and self-aligned process, this technique can afford to fabricate DMOSFETs with high cell density up to 100 Mcell/inch$^2$ and cost-effective production. The resulting unit cell pitch was 2.3∼2.4${\mu}$m. The fabricated device exhibited a excellent specific on-resistance characteristic of 0.36m$\Omega$. cm$^2$ with a breakdown voltage of 42V. Moreover, time to breakdown of gate oxide was remarkably increased by the hydrogen annealing after trench etching.

Trench D-MOS using MicroTec oxide according to the size of the current - voltage characteristics (MicroTec을 이용한 Trench D-MOS의 산화막크기에 따른 전류-전압 특성)

  • Lim, Se-Hoon;Han, Ji-Hyeong;Jung, Hak-Kee;Lee, Jong-In;Cheong, Dong-Soo;Kwon, Oh-Sin
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2010.05a
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    • pp.779-781
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    • 2010
  • Trench D-MOS(double-diffusion MOS)는 기존의 D-MOS를 대체한 것으로 전체 전류의 길이를 짧게 함으로써 온전압강하가 낮아지게 된다. 따라서 소자가 턴-온시에 전력소모가 작게 되며, 온저항과 트레이드 오프관계인 턴-오프 특성도 그다지 나빠지지 않아 트레이드 오프 특성도 개선되어지는 장점이 있다. 본 논문은 MicoroTec 시뮬레이션을 이용하여 Trench D-MOS의 산화벽을 다르게하여 전류-전압 특성을 연구하였다.

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A Study on the Electrical Characteristics of Ultra Thin Gate Oxide

  • Eom, Gum-Yong
    • Transactions on Electrical and Electronic Materials
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    • v.5 no.5
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    • pp.169-172
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    • 2004
  • Deep sub-micron device required to get the superior ultra thin gate oxide characteristics. In this research, I will recommend a novel shallow trench isolation structure(STI) for thin gate oxide and a $N_2$O gate oxide 30 $\AA$ by NO ambient process. The local oxidation of silicon(LOCOS) isolation has been replaced by the shallow trench isolation which has less encroachment into the active device area. Also for $N_2$O gate oxide 30 $\AA$, ultra thin gate oxide 30 $\AA$ was formed by using the $N_2$O gate oxide formation method on STI structure and LOCOS structure. For the metal electrode and junction, TiSi$_2$ process was performed by RTP annealing at 850 $^{\circ}C$ for 29 sec. In the viewpoints of the physical characteristics of MOS capacitor, STI structure was confirmed by SEM. STI structure was expected to minimize the oxide loss at the channel edge. Also, STI structure is considered to decrease the threshold voltage, result in a lower Ti/TiN resistance( Ω /cont.) and higher capacitance-gate voltage(C- V) that made the STI structure more effective. In terms of the TDDB(sec) characteristics, the STI structure showed the stable value of 25 % ~ 90 % more than 55 sec. In brief, analysis of the ultra thin gate oxide 30 $\AA$ proved that STI isolation structure and salicidation process presented in this study. I could achieve improved electrical characteristics and reliability for deep submicron devices with 30 $\AA$ $N_2$O gate oxide.