• 한국전기전자재료학회논문지
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• 제23권1호
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• pp.1-5
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• 2010

In this paper, we proposed trench field ring for breakdown voltage of power devices. The proposed trench field ring was improved 10% efficiency comparing with conventional field ring. we analyzed five parameters of trench field ring for design of trench field ring and carried out 2-D devices simulation and process simulations. That is, we analyzed number of field ring, juction depth, distance of field rings, trench width, doping profield. The proposed trench field ring was better to more 1000 V.

• 전기전자학회논문지
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• 제18권2호
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• pp.214-219
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• 2014

본 논문에서는 실리콘 카바이드(silicon carbide)를 기반으로 한 tilt-implanted trench Schottky diode(TITSD)를 제안한다. 4H-SiC 트랜치 쇼트키 다이오드(trench Schottky diode)에 형성되는 트랜치 측면에 경사 이온주입(tilt-implantation)을 하여 소자가 역저지 상태(reverse blocking mode)로 동작 시 trench insulator가 모든 퍼텐셜(potential)을 포함하는 구조를 제안하고, 그 특성을 시뮬레이션을 통해 확인하였다. TITSD는 트랜치의 측면(sidewall)에 nitrogen을 $1{\times}10^{19}cm^{-3}$ 으로 도밍(doping) 하여 항복전압(breakdown voltage) 특성도 경사 이온주입을 하지 않았을 때와 같게 유지하면서 trench oxide insulator가 모든 퍼텐셜을 포함하도록 함으로써 termination area를 감소시켰다. 트랜치 깊이(trench depth)를 $11{\mu}m$로 깊게 하고 최적화된 폭(width)을 선택함으로써 2750V의 항복전압을 얻었고, 동급의 항복전압을 가진 가드링(guard ring) 구조보다 termination area를 38.7% 줄일 수 있다. 이에 대한 전기적 특성은 synopsys사의 TCAD simulation을 사용하여 분석하였으며, 그 결과를 기존의 구조와 비교하였다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2009년도 하계학술대회 논문집
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• pp.118-119
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• 2009

This paper presents the feature profile evolution silicon deep trench etching, which is very crucial for the commercial wafer process application. The silicon deep trenches were etched with the SF6 gas & Hbr gas based process recipe. The optimized silicon deep trench process resulted in vertical profiles (87o~90o) with loading effect of < 1%. The process recipes were developed for the silicon deep trench etching applications. This scheme provides vertically profiles without notching of top corner was observed. In this study, the production of SF6 gas based silicon deep trench etch process much more strongly than expected on the basis of Hbr gas trench process that have been investigated by scanning electron microscope (SEM). Based on the test results, it is concluded that the silicon deep trench etching shows the sufficient profile for practical MOS FET silicon deep trench technology process.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2009년도 하계학술대회 논문집
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• pp.88-89
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• 2009

In this paper, we investigated about wet cleaning effect as deep trench formation methods for Power chip devices. Deep trench structure was classified by two methods, PSU (Poly Stick Up) and Non-PSU structure. In this paper, we could remove residue defect during wet. cleaning after deep trench etch process for non-PSU structure device as to change wet cleaning process condition. V-SEM result showed void image at the trench bottom site due to residue defect and residue component was oxide by EDS analysis. In order to find the reason of happening residue defect, we experimented about various process conditions. So, defect source was that oxide film was re-deposited at trench bottom by changed to hydrophobic property at substrate during hard mask removal process. Therefore, in order to removal residue defect, we added in-situ SCI during hard mask removal process, and defect was removed perfectly. And WLR (Wafer Level Reliability) test result was no difference between normal and optimized process condition.

• 한국진공학회지
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• 제11권4호
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• pp.212-217
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• 2002

고신뢰성 트렌치 게이트 MOSFET을 제작하기 위해 트렌치 코너를 pull-back 공정과 수소 열처리 공정을 이용하여 트렌치 코너를 둥글게 만드는 기술을 개발하였고 이를 이용하여 균일한 트렌치 게이트 산화막을 성장시킬수 있었다. 그 결과 수소 열처리 하기 전에 항복전압이 29 V인 것이 수소 열처리한 후 약 36 V로 증가하여 항복 전압에서 약 25% 향상되었다. 그리고 트렌치 게이트를 이용한 MOSFET에서 트렌치 셀이 약 45,000개 일때 게이트와 소스에 10 V를 인가했을 때, 드레인 전류는 약 45.3 A를 얻었고, 게이트 전압의 10 V, 전류를 5 A를 인가한 상태에서 On-저항은 약 55 m$\Omega$ 얻었다.

• Journal of Ship and Ocean Technology
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• 제6권2호
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• pp.12-22
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• 2002

Offshore pipelines play an important role in the transportation of gas, oil, water and oil products. It is common to have a group of pipelines in the oil and gas field. To reduce the installation cost and time, dual pipelines are designed. There are great advantages in the installation of dual pipelines over two separate single lines. It can greatly reduce the cost for trench, back-filling and installation. However the installation of dual pipelines often requires technical challenges. Pipelines should be placed to be stable against external loadings during installation and design life period. Dual pipelines in trench can reduce the influence of external forces. To investigate the flow patterns and forces as trench depth and slope changes, number of experiments are conducted with PIV(Particle Image Velocimetry) equipment in a Circulating Water Channel. Numerical approaches to simulate experimental conditions are also made to compare with experimental results. The velocity fields around dual pipelines in trench are investigated and analysed. Comparison of both results show similar patterns of flow around pipelines. It is proved that the trench depth contributes significantly on hydrodynamic stability. The trench slope also affects the pipeline stability. The results can be applied in the stability design of dual pipelines in trench section. The complex flow patterns can be effectively linked in the understanding of fluid motions around multi-circular bodies in trench.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2011년도 제42회 하계학술대회
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• pp.1501-1502
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• 2011

In this paper, an investigation of the 8" process for Trench Power MOSFET Application and Trench MOSFETs and its impact on device performance is presented. Layout dimensions of trench power MOSFETs have been continuously reduced in order to decrease the specific on-resistance, maintaining equal vertical dimensions. We discuss experimental results for devices with a pitch size down fabricated with an unconventional gate trench topology and a simplified manufacturing scheme. The fabricated Trench MOSFETs are observed the trench gate oxidation by SEM.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2010년도 하계학술대회 논문집
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• pp.389-389
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• 2010

In this paper, an investigation of the benefits of gate oxide for 8" the manufacturing of Trench MOSFETs and its impact on device performance is presented. Layout dimensions of trench power MOSFETs have been continuously reduced in order to decrease the specific on-resistance, maintaining equal vertical dimensions. We discuss experimental results for devices with a pitch size down fabricated with an unconventional gate trench topology and a simplified manufacturing scheme. The fabricated Trench MOSFETs are observed the trench gate oxidation by SEM.

• 전기전자학회논문지
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• 제14권3호
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• pp.199-204
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• 2010

본 논문에서는 전력반도체의 내압을 유지하는데 있어서 가장 중요한 필드 링의 개선을 위해 새로운 구조의 필드 링을 제안하였다. 제안한 트렌치 필드 링은 기존의 일반 필드 링에 비해 10%이상 효율을 개선하였다. 트렌치 필드 링의 설계를 위해 5가지의 변수를 두고 최적화 시뮬레이션을 수행하였으며, 수행한 파라미터 결과를 가지고 마스크를 설계하여 제작을 진행하였다. 내압이 증가하면 증가할 수록 트렌치 필드링이 일반 필드 링보다 더 좋은 결과를 가져올 수 있었다. 이러한 결과는 앞으로 전력반도체 소자인 IGBT, Power MOS 및 MCT 소자의 설계에 충분히 활용할 수 있을 것으로 판단된다.

• 반도체디스플레이기술학회지
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• 제20권4호
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• pp.167-170
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• 2021

Integrated passive device (IPD) technology has emerged with the need for 5G. In order to integrate and miniaturize capacitors inside IPD, various studies are actively performed using high-k materials and trench structures. In this paper, an EM(Electromagnetic) simulation study was performed by applying an oxide dielectric to the capacitors having a various trench type structures. Commercially available materials HfO₂, Al₂O₃, and Ta₂O₅ are applied to non, circle, trefoil, and quatrefoil type trench structures to confirm changes in each material or structure. As a result, the bigger the capacitor area and the higher dielectric constant of the oxide dielectric, the insertion loss tended to decrease.