• Journal of Power Electronics
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• v.18 no.3
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• pp.662-671
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• 2018

This paper presents a new structure for a step up dc-dc converter, which has several advantageous features. Firstly, the input dc source and the clamped capacitor are connected in series to transfer energy to the load through dual voltage multiplier cells. Therefore, the proposed converter can produce a very high voltage and a high conversion efficiency. Secondly, a double voltage clamped circuit is introduced to the primary side of the coupled inductor. The energy of the leakage inductance of the coupled inductor is recycled and the inrush current problem of the clamped circuits can be shared equally by two synchronous clamped capacitors. Therefore, the voltage spike of the switch tube is solved and the current stress of the diode is reduced. Thirdly, dual voltage multiplier cells can absorb the leakage inductance energy of the secondary side of the coupled inductor to obtain a higher efficiency. Fourthly, the active switch turns on at almost zero current and the reverse-recovery problem of the diodes is alleviated due to the leakage inductance, which further improves the conversion efficiency. The operating principles and a steady-state analysis of the continuous, discontinuous and boundary conduction modes are discussed in detail. Finally, the validity of this topology is confirmed by experimental results.

• Proceedings of the KSME Conference
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• 2001.11a
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• pp.810-814
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• 2001

power transfer breaker is a device used to transfer the load from the electricity power line to the emergency generators. In case of overload, it also functions as a circuit breaker. In this work, a new mechanism for the device is suggested. Among the various design challenges, optimization of the trigger mechanism is identified as of central importance. Optimal design decisions are made with the use of Taguchi method.

• Journal of the Korean Institute of Telematics and Electronics S
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• v.35S no.9
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• pp.28-34
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• 1998

In ATM networks CBR data traffic is sent in constant bit rate, and VBR data traffic in variable bit rate. Therefore unused bandwidth at network capacity may exist. To avoid waste of network resourcesm, ABR traffic utilizes the unused bandwidth to the utmost after CBR and VBR data traffic being first served. In this paper, a transfer rate-based congestion control algorithm is proposed for efficient ABR service in ATM networks. In the proposed algorithm the ATM switch first calculates bandwidth according to variable cell transfer rate in an ABR source. records this value in ER field in a RM cell, and then transmits a RM Cell to an ABR source. In this way the proposed algorithm dynamically allocates bandwidth to each ABR source, and the switch also can rapidly adapt to a change of a transfer rate of an source. The performance simulation of the proposed algorithm has batter performance in terms of source condition and link utilization.

• Proceedings of the KIEE Conference
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• 2015.07a
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• pp.155-156
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• 2015

Recently, electricity consumption has rapidly increased along with economic growth. The operating strategy using emergency generator is aimed, to resolve a demand response management. For strategy of peak shedding using emergency generator, it is essential to introduce the fast transfer switching device. One of the most effective solutions is to use a static transfer switch (STS) based on thyristor. However, the characteristic of natural commutated SCR thyristor should anticipate short duration voltage sag. STS system thus requires more than a quarter cycle to successfully complete transfer process. This paper proposes the operation scheme of the STS system using the forced-commutation technique to mitigate instantaneous voltage sag during peak transfer process. Proposed STS system improved turn-off characteristic thus accomplishes the peak load shedding satisfied power quality. Performance of the proposed STS system is evaluated using electromagnetic transient program (EMTP) to confirm the effectiveness.

• Investigative Magnetic Resonance Imaging
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• v.22 no.1
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• pp.26-36
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• 2018

Purpose: Children born with single ventricle physiology demonstrate poor growth rate and suffer from malnutrition, which lead to increased morbidity and mortality in this population. We assume that an anabolic steroid, oxandrolone, will promote growth in these infants by improving myocardial energy utilization. The purpose of this paper is to study the efficacy of oxandrolone on myocardial energy consumption in these infants. Materials and Methods: We modeled single ventricle physiology in a lamb by prenatally shunting the aorta to the pulmonary artery and then postnatally, we monitored cardiac energy utilization by quantitatively measuring the first order reaction rate constant, $k_f$ of the creatine-kinase reaction in the heart using magnetization transfer $^{31}P$ magnetic resonance spectroscopy, home built $^1H/^{31}P$ transmit/receive double tuned coil, and transmit/receive switch. We also performed cine MRI to study the structure and dynamic function of the myocardium and the left ventricular chamber. The spectroscopy data were processed using home-developed python software, while cine data were analyzed using Argus software. Results: We quantitatively measured both the first order reaction rate constant and ejection fraction in the control, shunted, and the oxandrolone-treated lambs. Both $k_f$ and ejection fraction were found to be more significantly reduced in the shunted lambs compared to the control lambs, and they are increased in oxandrolone-treated lambs. Conclusion: Some improvement was observed in both the first order reaction rate constant and ejection fraction for the lamb treated with oxandrolone in our preliminary study.

• Journal of the Korea Society of Computer and Information
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• v.10 no.5 s.37
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• pp.123-132
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• 2005

In this Paper, we present an improvement of switch node for wavelength multiplex optical network. Currently because of quick increase of internet traffic a big network capacity is demanded. Wavelength multiplex optical network Provides the data transfer of high speed and the transparent characteristic of the data. Therefore optic network configuration is the most powerful technology in the future. It will be able to control the massive traffic from the optical network in order to transmit the multimedia information of very many quantify. Consequently the node where the traffic control is Possible, is demanded. The optical switch node which manages efficiently the multiple wavelength was Proposed. This switch is composed of a optical switch module for switching and a wavelength converter module for wavelength conversion. It will be able to compose the switch fabric without optical/electro or electro/optical conversion using optical MEMS(Micro Electro Mechanical Switches) module. Finally, we present the good test result regarding the operational qualify of the switch fabric and the performance of optical signal from the switch node. The proposed switch node of the optic network will be able to control the massive traffic with all optical.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.21 no.1
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• pp.80-90
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• 1996

The efficienty of ATM is based on the statical multiplexing of fixed-length packets, which are called cells. The most important technical point for realizing ATM switching network is an arrangement of the buffers and switches. Current most ATM switching networks are being achieved by using the switching modules based on the unit switch of $8{\times}8$ 150Mb/s or $16{\times}16$ 150Mb/s, the unit switch of $32{\times}32$150Mb/s for a large scale system is under study in many countries. In this paper, we proposed a new $32{\times}32$(4.9Gb/s throughput) ATM switch using Shared buffer memory switch which provides superior traffic characteristics in the cell loss, delay and throughput performance and easy LSI(Large Scale Integrated circuit). We analytically estimated and simulated by computer the buffer size into it. We also proposed the configuration of the large capacity ATM switching network($M{\times}M$.M>1,000) consisting of multistage to improve the link speed by non-blocking.

• Journal of KIISE:Information Networking
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• v.34 no.3
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• pp.193-202
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• 2007

In this paper, a performance evaluation model of the Multistage Interconnection Network(MIN) with the multiple-buffered crossbar switches under Hot-spot environment is proposed and examined. Buffered switch technique is well known to solve the data collision problem of the MIN. The proposed evaluation model is developed by investigating the transfer patterns of data packets in a switch. The performance of the multiple-buffered $a{\times}a$ crossbar switch is analyzed. Steady state probability concept is used to simplify the analyzing processes. Two important parameters of the network performance, throughput and delay, are then evaluated. To validate the proposed analysis model, the simulation is carried out on a Baseline network that uses the multiple buffered crossbar switches. Less than 2% differences between analysis and simulation results are observed. It is also shown that the network performance is significantly improved when the small number of buffer spaces is given. However, the throughput elevation is getting reduced and network delay becomes increasing as more buffer spaces are added in a switch.

• Journal of KIISE:Information Networking
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• v.30 no.4
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• pp.520-534
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• 2003

In this paper, a performance evaluation model of the Fat-tree Network with the multiple-buffered crossbar switches is proposed and examined. Buffered switch technique is well known to solve the data collision problem of the switch network. The proposed evaluation model is developed by investigating the transfer patterns of data packets in a switch with output-buffers. Two important parameters of the network performance, throughput and delay, are then evaluated. The proposed model takes simple and primitive switch networks, i.e., no flow control and drop packet, to demonstrate analysis procedures clearly. It, however, can not only be applied to any other complicate modern switch networks that have intelligent flow control but also estimate the performance of any size networks with multiple-buffered switches. To validate the proposed analysis model, the simulation is carried out on the various sizes of Fat-tree networks that uses the multiple buffered crossbar switches. Less than 2% differences between analysis and simulation results are observed.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.22 no.6
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• pp.1323-1333
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• 1997

In this paper, we propose an efficient architecture for a high-speed cell concentrator/distributor(HCCD) in an ATM(Asynchronous Transfer Mode) switch and by analyzeing the simulation results evaluate the performance of the proposed architecuture. The proposed HCCD distributes cells from a switch link to local processors, or concentrates cells from local processor s to a switch link. This design is to guarntee a high throughput for the IPC (inter-processor communication) link in a distributed ATM switching system. The HCCD is designed in a moudlar architecture to provide the extensibility and the flexibility. The main characteristics of the HCCD are 1) Adaption of a local CPU in HCCD for improving flexibility of the system, 2) A cell-baced statistical multiplexing function for efficient multiplexing, 3) A cell distribution function based on VPI(Virtual Path Identifier), 4) A bypassing capability for IPC between processor attached to the same HCCD, 5) A multicasting capability for point-to-multipoint communication, 6) A VPI table updating function for the efficient management of links, 7) A self-testing function for detecting system fault.