• Proceedings of the KIPE Conference
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• 2018.11a
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• pp.95-97
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• 2018

The power quality of Single Phase Grid-Connected Inverters (GCIs) has received much attention with the increasing number of Distributed Generation (DG) systems. However, the performance of single phase GCIs get degraded due to several factors such as the grid voltage harmonics, the dead time effect, and the turn ON/OFF of the switches, which causes the harmonics at the output of GCIs. Therefore, it is not easy to satisfy the harmonic standards such as IEEE 519 and P1547 without the help of harmonic compensator. To meet the harmonic standards a certain kind of harmonic controller needs to be added to the current control loop to effectively mitigate the low order harmonics. In this paper, the harmonic compensation is performed using a novel robust harmonic compensation method based on Digital Lock-in Amplifier (DLA). In the proposed technique, DLAs are used to extract the amplitude and phase information of the harmonics from the output current and compensate it by using a simple PI controller in the feedforward manner. In order to show the superior performance of the proposed harmonic compensation technique, it is compared with those of conventional harmonic compensation methods in terms of the effectiveness of harmonic elimination, complexity, and implementation. The validity of the proposed harmonic compensation techniques for the single phase GCIs is verified through the experimental results with a 5kW single phase GCI. Index Terms -Single Phase Grid Connected Inverter (SPGCI), Harmonic Compensation Method, Total Harmonic Distortion (THD) and Harmonic Standard.

• Journal of Electrical Engineering and Technology
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• v.10 no.5
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• pp.2018-2030
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• 2015

A two stage ac drive configuration consisting of a single-phase line commutated rectifier and a three-phase voltage source inverter (VSI) is very common in low and medium power applications. The deterministic pulse width modulation (PWM) methods like sinusoidal PWM (SPWM) could not be considered as an ideal choice for modern drives since they result mechanical vibration and acoustic noise, and limit the application scope. This is due to the incapability of the deterministic PWM strategies in sprawling the harmonic power. The random PWM (RPWM) approaches could solve this issue by creating continuous harmonic profile instead of discrete clusters of dominant harmonics. Insufficient filtering at dc link results in the amplitude distortion of the input dc voltage to the VSI and has the most significant impact on the spectral errors (difference between theoretical and practical spectra). It is obvious that the sprawling effect of RPWM undoubtedly influenced by input fluctuation and the discrete harmonic clusters may reappear. The influence of dc link fluctuation on harmonics and their spreading effect in the VSI remains invalidated. A case study is done with four different filter capacitor values in this paper and results are compared with the constant dc input operation. This paper also proposes an ingenious RPWM, a ripple dosed sinusoidal reference-random carrier PWM (RDSRRCPWM), which has the innate capacity of suppressing the effect of input fluctuation in the output than the other modern PWM methods. MATLAB based simulation study reveals the fundamental component, total harmonic distortion (THD) and harmonic spread factor (HSF) for various modulation indices. The non-ideal dc link is managed well with the developed RDSRRCPWM applied to the VSI and tested in a proto type VSI using the field programmable gate array (FPGA).

• Journal of Electrical Engineering and Technology
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• v.3 no.3
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• pp.391-400
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• 2008

Multi-pulse topology of converters using elementary six-pulse GTO - VSC (gate turn off based voltage source converter) operated under fundamental frequency switching (FFS) control is widely adopted in high power rating static synchronous compensators (STATCOM). Practically, a 48-pulse ($6{\times}8$ pulse) configuration is used with the phase angle control algorithm employing proportional and integral (PI) control methodology. These kinds of controllers, for example the ${\pm}80MVAR$ compensator at Inuyama switching station, KEPCO, Japan, employs two stages of magnetics viz. intermediate transformers (as many as VSCs) and a main coupling transformer to minimize harmonics distortion in the line and to achieve a desired operational efficiency. The magnetic circuit needs altogether nine transformers of which eight are phase shifting transformers (PST) used in the intermediate stage, each rating equal to or more than one eighth of the compensator rating, and the other one is the main coupling transformer having a power rating equal to that of the compensator. In this paper, a two-level 48-pulse ${\pm}100MVAR$ STATCOM is proposed where eight, six-pulse GTO-VSC are employed and magnetics is simplified to single-stage using four transformers of which three are PSTs and the other is a normal transformer. Thus, it reduces the magnetics to half of the value needed in the commercially available compensator. By adopting the simple PI-controllers, the model is simulated in a MATLAB environment by SimPowerSystems toolbox for voltage regulation in the transmission system. The simulation results show that the THD levels in line voltage and current are well below the limiting values specified in the IEEE Std 519-1992 for harmonic control in electrical power systems. The controller performance is observed reasonably well during capacitive and inductive modes of operation.

• Journal of Power Electronics
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• v.16 no.4
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• pp.1306-1315
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• 2016

Modern power systems driven by high-power converters have become inevitable in view of the ever increasing demand for electric power. The total power loss can be reduced by limiting the switching losses in such power converters; increased power efficiency can thus be achieved. A reduced switching frequency that is less than a few hundreds of hertz is applied to power converters that produce output waveforms with high distortion. Selective harmonic elimination pulse width modulation (SHEPWM) is an optimized low switching frequency pulse width modulation method that is based on offline estimation. This method can pre-program the harmonic profile of the output waveform over a range of modulation indices to eliminate low-order harmonics. In this paper, a SHEPWM scheme for three-phase three-leg neutral point clamped inverter is proposed. Aside from eliminating the selected harmonics, the DC capacitor voltages at the DC bus are also balanced because of the symmetrical pulse pattern over a quarter cycle of the period. The technique utilized in the estimation of switching angles involves the firefly algorithm (FA). Compared with other techniques, FA is more robust and entails less computation time. Simulation in the MATLAB/SIMULINK environment and experimental verification in the very large scale integration platform with Spartan 6A DSP are performed to prove the validity of the proposed technique.

• Proceedings of the KIEE Conference
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• 2005.07a
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• pp.214-216
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• 2005

A magnitude of generated harmonic currents along with the operation of traction has nonlinear characteristics. The harmonic currents generated along with the operating speed of electrical railroad traction is to analyze very difficulty. This paper therefore presents probabilistic approach for the harmonic currents evaluation about the operating speed of the arbitrary single traction. To use probabilistic method for railroad system, probability density function(PDF) using measuring data based on the realistic harmonic currents per operating speed is calculated. Mean and variance of harmonic currents of single traction also are obtained the PDF of the operating speed and electrical railroad traction model. Uncertainty of harmonic currents expects to results through mean and variance with PDF. The probability of harmonic currents generated with the operating of arbitrary many tractions is calculated by the convolution of functions. The harmonics of different number of tractions are systematically investigated. It is assessed by the total demand distortion(TDD) for the railroad system.

• Journal of Power Electronics
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• v.10 no.4
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• pp.412-418
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• 2010

This paper proposes a new algorithm to generate a reference signal for an active power filter using a sliding-window FFT operation to improve the steady-state performance of the active power filter. In the proposed algorithm the sliding-window FFT operation is applied to the load current to generate the reference value for the compensating current. The magnitude and phase-angle for each order of harmonics are respectively averaged for 14 periods. Furthermore, the phase-angle delay for each order of harmonics passing through the controller is corrected in advance to improve the compensation performance. The steady-state and transient performance of the proposed algorithm was verified through computer simulations and experimental work with a hardware prototype. A single-phase active power filter with the proposed algorithm can offer a reduction in THD from 75% to 4% when it is applied to a non-linear load composed of a diode bridge and a RC circuit. The active power filter with the proposed reference generation method shows accurate harmonic compensation performance compared with previously developed methods, in which the THD of source current is higher than 5%.

• Journal of Power Electronics
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• v.19 no.6
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• pp.1496-1504
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• 2019

This paper proposes a new THD reduction algorithm for modular multilevel converters (MMCs) with offset voltage injection operated in nearest level modulation (NLM). High voltage direct current (HVDC) is actively introduced to the grid connection of offshore wind powers, and this paper deals with a voltage generation technique with an MMC for wind power generation. In the proposed method, third harmonic voltage is added for reducing the THD. The third harmonic voltage is adjusted so that each of the pole voltage magnitudes maintains a constant value with a maximum number of (N+1) levels, where N is the number of sub-modules per arm. By using the proposed method, the THD of the output voltage is mitigated without increasing the switching frequency. In addition, the proposed method has advantageous characteristics such as simple implementation. As a part of this study, this paper compares the THD results of the conventional method and the proposed method with offset voltage injection to reduce the THD. In this paper, simulations have been carried out to verify the effectiveness of the proposed scheme, and the proposed method is implemented by a HILS (Hardware in the Loop Simulation) system. The obtained results show agreement with the simulation results. It is confirmed that the new scheme achieved the maximum level output voltage and improved the THD quality.

• Journal of Power Electronics
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• v.13 no.5
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• pp.877-883
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• 2013

This paper discussed a transformer-less shunt static synchronous compensator (STATCOM) with consideration of the following aspects: fast compensation of the reactive power, harmonic cancelation and reducing the unbalancing of the 3-phase source side currents. The STATCOM control algorithm is based on the theory of instantaneous reactive power (P-Q theory). A self charging technique is proposed to regulate the dc capacitor voltage at a desired level with the use of a PI controller. In order to regulate the DC link voltage, an off-line Genetic Algorithm (GA) is used to tune the coefficients of the PI controller. This algorithm arranged these coefficients while considering the importance of three factors in the DC link voltage response: overshoot, settling time and rising time. For this investigation, the entire system including the STATCOM, network, harmonics and unbalancing load are simulated in MATLAB/SIMULINK. After that, a 35KVA STATCOM laboratory setup test including two parallel converter modules is designed and the control algorithm is executed on a TMS320F2812 controller platform.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.64 no.9
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• pp.1288-1296
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• 2015

The ac side current of a line commutated converter(LCC) high voltage direct current (HVDC) is characterized by highly non-sinusoidal waveform. If the harmonic current is allowed to flow in the connected ac network, it may cause unacceptable levels of distortion. Therefore, ac side filters are required as part of the total HVDC converter station, in order to reduce the harmonic distortion of the ac side current and voltage to acceptably low levels. The ac filters are also employed to compensate the requested reactive power because LCC HVDC also consume substantial reactive power. Among different types of filters, triple-tuned filters have been widely utilized for HVDC system. This paper presents two design methods of triple-tuned filter; equivalent method and parametric method. Using a parametric method, in particular this paper proposes a design algorithm for a triple tuned filter. Finally, the performance of the design algorithm is evaluated for a 250kV HVDC system in Jeju island. The results cleary demonstrate the effectiveness of proposed design method in harmonics reduction.

• Journal of Power Electronics
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• v.16 no.6
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• pp.2162-2172
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• 2016

This paper presents a Direct Torque Control (DTC) strategy for the five-phase induction motor driven by a three-level five-phase inverter in order to improve the performance of the five-phase induction motor. In the proposed DTC technique, only 22 voltage vectors out of 243 available voltage vectors in a three-level five-phase inverter are selected and are divided in 10 sectors each with a width of $36^{\circ}$. The four different DTC combinations (DTC-I, II, III and IV) for a three-level five-phase induction motor drive are investigated for improving the performance of five-phase induction motor. All four of the DTC strategies utilize a combination of the same large and zero voltage vectors, but with different medium voltage vectors. Out of these four techniques, DTC-II gives the best performance when compared to the others. This DTC-II technique is analyzed in detail for improvements in the performance of five-phase induction motor in terms of torque ripple, x-y stator flux and Total Harmonics Distortion (THD) of the stator phase current when compared to its two-level counterparts. To verify the effectiveness of the proposed three-level five-phase DTC control strategy, a DSP based experimental system is build. Simulation and experimental results are provided in order to validate the proposed DTC technique.