Natural Balancing of the Neutral Point Potential of a Three-Level Inverter with Improved Firefly Algorithm

Abstract

Modern power systems driven by high-power converters have become inevitable in view of the ever increasing demand for electric power. The total power loss can be reduced by limiting the switching losses in such power converters; increased power efficiency can thus be achieved. A reduced switching frequency that is less than a few hundreds of hertz is applied to power converters that produce output waveforms with high distortion. Selective harmonic elimination pulse width modulation (SHEPWM) is an optimized low switching frequency pulse width modulation method that is based on offline estimation. This method can pre-program the harmonic profile of the output waveform over a range of modulation indices to eliminate low-order harmonics. In this paper, a SHEPWM scheme for three-phase three-leg neutral point clamped inverter is proposed. Aside from eliminating the selected harmonics, the DC capacitor voltages at the DC bus are also balanced because of the symmetrical pulse pattern over a quarter cycle of the period. The technique utilized in the estimation of switching angles involves the firefly algorithm (FA). Compared with other techniques, FA is more robust and entails less computation time. Simulation in the MATLAB/SIMULINK environment and experimental verification in the very large scale integration platform with Spartan 6A DSP are performed to prove the validity of the proposed technique.

I. I NTRODUCTION

The advantages of multilevel inverters (MLIs), such as improved power quality and design flexibility, with components of low voltage ratings to handle or produce high voltage levels and hence high power levels have resulted in the extensive use of these inverters in high-power applications [1]. The three well-known configurations of MLI are diode clamped, flying capacitor, and cascaded H bridge type multilevel inverters. Among them, the NPC inverter is used more often in the high-voltage industrial sector at the voltage range of 2.3 KV to 4.16 KV. Several applications of the NPC inverter can even handle voltages up to 6 KV [2]. Its compactness, efficiency, and good performance make the NPC inverter useful in the drives industry.

The increasing demand for electrical power could be satisfied only with appropriately designed high-power converters. If these converters are operated at a high switching frequency, then the harmonic content could be reduced at the cost of high switching losses. However, strict power quality and high switching frequency should be maintained. If the system is power efficiency conscious, then a low switching frequency should be opted for. Selective harmonic elimination pulse width modulation (SHEPWM) is an efficient scheme with a switching frequency in the order of a small integer multiple of the fundamental frequency.

With SHEPWM, the strength of the dominant low-order harmonics is reduced drastically or nearly eliminated. Then, the high-order harmonics can be easily eliminated with small passive filters. To eliminate the low-order harmonics and improve the spectral with the required amplitude of the fundamental wave, a set of trigonometric Fourier series transcendental equations need to be solved. In addition, a set of switching angles need to be obtained. Such a set of nonlinear equations are traditionally solved with the Newton–Raphson (NR) method [3]-[5]. However, the NR method can be applied to continuously differentiable functions and requires an approximate but appropriate initial guess. Another drawback of the NR method is that it consumes much computation time and thus cannot be applied in real-time applications. Under such circumstances, several authors recommended and demonstrated that this problem can be regarded as an optimization problem rather than a deterministic algebraic problem so that optimally estimated switching angles can be obtained.

In addition to the estimation of the switching angles, an additional issue exists in the case of the NPC inverter. This issue is associated with the balancing of the DC voltages prevailing across the terminals of the split capacitors at the DC link. SHEPWM allows for natural balancing of the neutral point voltage because of symmetrical pulse patterns over a quarter cycle of the period.

The authors in [6] and [7] proposed a technique to achieve balancing of the DC voltage. In this technique, the switching angles are first estimated. Then, fine adjustment is incorporated into this solution set to address the balancing of the voltage across the DC link capacitors. The authors in [8] presented a six-level diode-clamped inverter for a standalone application that is powered by a photovoltaic unit. In [9], the performance of SHEPWM for NPC inverters was compared with that of three other PWMs. SHEPWM has also been used in voltage-source-converter-based drive applications with the aim of reducing the common-mode voltage [10]. Optimal switching angles for NPC inverters have been discovered by using the clonal selection algorithm [11].

Evaluation of switching angles by solving the SHE equations has been demonstrated by using other heuristic search algorithms, such as the genetic algorithm [12], differential evolution [13], particle swarm optimization [14], and the bee algorithm [15], for other types of MLIs.

In this study, a nature-inspired meta heuristic algorithm known as the self-adaptive improved firefly algorithm (FA) [17] is utilized to obtain optimum switching angles for the three-level neutral point clamped inverter. The original FA depends on its parameters, such as absorption coefficients (γ), attraction coefficient (β), and random movement factor (µ), which result in the attainment of local optima unless their values are properly selected. In the proposed FA, the value of µ is adaptively tuned in each iteration. A powerful mutation strategy is incorporated to improve performance and prevent convergence into any unexpected local minima. Hence, this method yields better results than the original FA.

The proposed methodology is validated in a simulation environment using MATLAB/SIMULINK. An experimental setup is also developed with a field-programmable gate array (FPGA) in the SPARTAN 6A DSP platform. Concurrent processing capability, calculation ability, flexibility, high-integration density, processing speed, and dynamic reconfiguration in the hardware architecture during runtime make FPGA a proper solution for the implementation of the proposed PWM. In [18], variable common-mode injection PWM for a three-level inverter was implemented with FPGA. In the current work, FPGA is utilized to implement SHE. The experimental results validate the simulation results obtained.

 

II. NPC INVERTER TOPOLOGY

The NPC inverter has been applied in various industrial applications since its introduction in 1981. The topological arrangement of the three-phase three-level NPC inverter is shown in Fig. 1. In its basic form, the three-level three-phase NPC inverter has two DC link capacitors (C1 and C2) connected in series, and this section is connected across the main DC power source. Thus, the sourcing DC voltage is divided into three voltage levels, namely, +Vdc/2, 0, and −Vdc/2. These voltage levels appear at the output of each phase of the inverter through appropriate switching of the power semiconductor devices. Thus, the three phases of the inverter share a common DC bus. The middle point of the two capacitors is denoted as “0,” which is the neutral point. Two complementary switch pairs, namely, (Sa1, Sa1’) and (Sa2, Sa2’), exist. Two clamping diodes (Da1, Da1’) per phase are also present in this inverter. The two outer switches are the main switching devices (Sa1, Sa2’) that operate for pulse width modulation, and the two inner switches are the auxiliary switching devices (Sa2, Sa1’) that clamp the output terminal potential to the neutral point potential with the help of the two clamping diodes.

Fig. 1.Structure of three-level NPC inverter.

Table I shows the three states in terms of the voltage levels of a three-phase three-level inverter. The neutral point of the load is connected to the center point of the split DC link capacitors when the state is 0. During this period, current flows through the neutral line. This condition causes a capacitor to become discharged while the other is being charged. The average neutral current is zero, and the average neutral point voltage is also zero under normal operating conditions for a wide range of modulation indices. However, under transient conditions or under conditions of three-phase load imbalances, the average neutral current is no longer zero, and the neutral point voltage is subjected to variations. In a multilevel inverter with multiple DC link capacitors, the duration of contribution of electric power is not equally shared by all the capacitors over a cycle of a period because of the different periods of conduction of each switch.

TABLE IVOLTAGE LEVELS AND THE CORRESPONDING SWITCHING STATES OF THE INVERTER

 

III. SELECTIVE HARMONIC ELIMINATION

VSC topologies associated with SHEPWM provide high-quality output voltage. With SHEPWM, the power quality may be increased for utility-grade power electronic converters, such as those utilized in HVDC power transmission systems. Other modern and advanced static compensators (STATCOMs) belonging to the family of flexible alternating current transmission system (FACTS) technologies can also benefit from the SHEPWM strategy. VSC experiences higher switching losses because of PWM control compared with current-sourced solutions that use low-frequency line-commutated thyristors. Meanwhile, SHEPWM is considered as an optimum modulation scheme owing to its superior harmonic profile with minimum switching frequency. Selectively eliminating low-order harmonics does not immediately lead to overall improvement of the quality of the output voltage wave of the inverter. It basically pushes out the energy content in these harmonics toward high-order harmonics. Therefore, the total harmonic distortion (THD) of the SHEPWM-based inverter output voltage remains high until the high-order harmonics are also eliminated by filtering them with passive filters.

A. Mathematical Model of Switching

A three-level inverter line to neutral SHEPWM waveform is shown in Fig. 2. It has five switching angles, namely, α1, α2, α3, α4, and α5.

Fig. 2.Phase voltage waveform of the NPC inverter.

Owing to the waveform characteristics of odd and half-wave symmetry, the Fourier series expansion of the line to neutral voltage of phase leg “a” of the NPC inverter is

By properly computing the switching angles ∝1 … . . ∝n, n number of harmonics can be eliminated. In this proposed work that uses five switching angles, four non–triplen harmonics (5th, 7th, 11th, and 13th order) can be eliminated as follows:

where A0 is the magnitude of the desired fundamental value and M is the modulation index. Notably,

Solving the above nonlinear transcendental equations using iterative methods require a proper initial guess. Hence, self-adaptive improved firefly algorithm (SAIFA) is proposed to obtain optimum switching angles to eliminate specified nontriplen low-order harmonics and to obtain the desired fundamental value. Triplen harmonics need not be eliminated because they disappear as a result of the nature of the three-phase circuit.

 

IV. SAIFA

Most of the modern optimization algorithms are inspired by nature, and such algorithms are collectively known as metaheuristic algorithms. Among the 11 popular metaheuristic algorithms utilized for optimization, FA is the best in terms of execution speed when applied to a micro contoller. FA, which is inspired by fireflies or lightning bugs, was developed by Yang [16]. Fireflies exhibit a peculiar behavior, which when modelled in a mathematical background leads to solutions in the optimization domain. The use of simple algebraic proceedures is either time consuming or impossible in this domain.

The behavior of fireflies exhibits three advantageous rules. The first rule is that fireflies are unisex in nature. Being unisex, their attraction to each other in the pursuit of their movements are sex independent. The question of crossover is avoided, and this is an advantage over the genetic algorithm. The second rule is that each firefly is attracted to nearby and brighter fireflies; this condition occurs as a function of the distance between the individual firefly and the neighboring brighter one. An interesting feature of fireflies is that if they experience difficulty distinguishing flies with more brightness than their own, they tend to exhibit an apparently random motion. Their entire movement can be an ordered and governed one based on the parameters that can be sensed only by the flies but are not visible to human eyes (e.g., brightness of their light).

The third rule is that when realized as an optimization algorithm, the value of the objective funtion associated with each firefly is related to the brightness of the individual firefly. An appropriate fitness function is formulated in such a manner that will maximize the fundamental voltage and eliminate the low-order harmonics.

The essence of selective harmonic elimination is the estimation of a certain number of switching instants. In this study, SAIFA is proposed [17] to obtain the optimal switching instants. SAIFA is better than the original FA because SAIFA overcomes the tendency of FA to converge at the local minima. The inclusion of a new mutation operator in SAIFA significantly enhances its performance.

A. Pseudo Code for the Implementation of Improved FA

We assign the constants of FA, namely, βmin=0.2, βmax=1, γ=1, p=2, and maximum number of iterations=200. The steps of the proposed algorithm are shown below.

Generate initial population of fireflies randomly, i.e., the switching angles

satisfying Eq. (1), where m = 1, …, Nfirefly, N = no. of switching angles

Initialize maximum iteration (ite_max) as stopping criteria Set initial iteration, k=1

While (k < ite_max)

Compute light intensity (fitness value) for all fireflies using Eq. (6) and store the best fitness value in variable Gbest.

For m = 1, …, Nfirefly

If minimum (Gbest) < fitness ,

Calculate the distance rij and β using Eqs. (7) and (8)

Adaptively tune μ using Eq. (9)

Update decision variables using Eq. (10)

Else

End if

End for

// mutation operation

Evaluate mutant fireflies for N fireflies using Eq. (11)

For i = 1 … . . Nfirefly

End for

Compute fitness value for

// Selection operation

For m=1…Nfirefly

If Fitness (,mutnew) < Fitness () then assign

Else assign

Endif

End for

Compute fitness and update Gbest with minimum fitness value .

End while

Print the best firefly from Gbest as the optimal solution.

 

V. RESULTS AND DISCUSSION

A. Simulation Results

The application of FA in the natural balancing of the neutral point potential of the NPC inverter was developed as an m file in the MATLAB environment. The improved FA, after being developed in MATLAB, was run over 20 independent trials. The optimal switching angles for the modulation indices 0.6 and 0.8 were determined and tabulated in Table II. For the optimum switching angles, the harmonic spectrum pertaining to the output voltage of the inverter for the modulation indices (MI) of 0.6 and 0.8 is shown in Fig. 3 and 4.

TABLE IISWITCHING ANGLES FOR MI OF 0.6 AND 0.8

Fig. 3.(a) Harmonic spectrum. (b) Output line voltage. (c) Phase voltage waveform for modulation index of 0.8.

Fig. 4.(a) Harmonic spectrum. (b) Output line voltage. (c) Phase voltage waveform for MI of 0.6.

The spectrum indicates that the amplitude of the fundamental value is as required for the given modulation indices. Harmonics up to the 13th order other than the triplen harmonics were eliminated.

The neutral current waveform for the modulation indices of 0.6 and 0.8 is shown in Fig. 5. This current slightly varies around zero because of nearly perfect balancing of the DC link capacitor voltages and because of the proper symmetrical switching scheme adopted in SHEPWM.

Fig. 5.Neutral current for MI of (a) 0.8 and (b) 0.6.

Table IV shows a comparison of THD for line and phase voltage THD as provided in [19] for the modulation indices of 0.5 and 0.9 with the three switching angles shown in Table III. The three methods considered for comparison are criteria-based modulation (CBM) [19], SHE using numerical method [3], and synchronous optimal pulse width modulation (SOPWM) [20]. The table shows that proposed method produces better results than the three other methods.

TABLE IIISWITCHING ANGLES FOR MI OF 0.5 AND 0.9

TABLE IVTHD COMPARISON OF LINE AND PHASE VOLTAGE FOR MI OF 0.5 AND 0.9

Fig. 6 and 7 show the harmonic spectrum for the line and phase voltage for MIs of 0.9 and 0.5, respectively, with three switching angles. The proposed method produces smaller THD values than the three other methods in addition to the elimination of 5th and 7th order harmonics. In the other three methods, these harmonics are much higher for the switching angles provided in [19] for the MIs of 0.5 and 0.9. Hence, the proposed method produces a globally optimum solution for the elimination of harmonics and THD.

Fig. 6.(a) Line voltage spectrum. (b) Phase voltage spectrum for MI of 0.9 using the proposed FA.

Fig. 7.(a) Line voltage spectrum. (b) Phase voltage spectrum for MI of 0.5 using the proposed FA.

B. Experimental Results

A suitable experimental hardware was fabricated with FPGA Spartan 6A DSP. For the digital control of power electronic converters, microcontrollers and DSPs are utilized when the number of PWM pulses generated are limited. Hence, FPGA is a good solution for the implementation of PWM algorithms in high-power converters.

1) FPGA Controller: The SPARTAN 6A DSP board generates the 12 required switching pulses for the 12 IGBTs used in the NPC inverter. The optimum switching angles obtained from FA offline were entered into the FPGA kit by using the user interface increment/decrement push buttons. Xilinx XC6SLX25 Spartan 6A DSP FPGA is the core of the system. It contains 24,051 logic cells, a 48 bit accumulator, 229 KB dynamic RAM, 38 DSP48A1 slices, and 52×18 Kb block random access memory (BRAM). The ISE12.1 platform has been utilized to perform synthesis, placement, and routing operations. A 20 MHz external clock generator was used to generate the required clocking signal. The carrier generator was implemented in FPGA using an up–down counter. The counter counts from zero to the maximum value m and then counts down to zero. Thus, the triangular generator counts a total number of 2m in each half cycle of the output period. As the half cycle period is 0.01 s, the count 2m is calculated as , which is equal to 200,000; count m is reduced to 1000.

Fig. 8 shows the three carrier waves with a phase shift of 120° generated for the three phases of the NPC inverter. The switching angles α1 … α5 are converted into constants using the conversion and then compared with the carrier waveform for generating gate pulses. Fig. 9 shows the gating pulses generated for the 12 switches of the NPC inverter.

Fig. 8.Carrier waves phase shifted by 120° for the three phases of the NPC inverter.

Fig. 9.Gating pulses generated for the 12 switches of the NPC inverter.

2) Experimental Setup: Fig. 10 shows the experimental setup of the three-phase three-level NPC inverter for the proposed algorithm. The power circuit of the NPC inverter consists of 12 IGBTs and 6 ultra-fast power diodes with a rating of 600 V/40 A. It has an input and output voltage rating of 300 V DC and 200 V AC, respectively. However, for the implementation, the input voltage provided is 120 V DC, and resistive load is connected at the output. Table V shows the THD and individual harmonic components for the MIs of 0.8 and 0.6 obtained in both the simulation and hardware.

Fig. 10.Experimental setup of the proposed work.

TABLE VCOMPARISON OF SIMULATION AND EXPERIMENTAL RESULTS OF INDIVIDUAL HARMONIC COMPONENTS AND THD

Table V proves that the experimental results agree well with those of the simulation and thus prove the validity of the proposed method. The experimental results measured with a Yokogawa power harmonic analyzer are shown in Fig. 11 and 12 for MIs of 0.8 and 0.6, respectively. The harmonic spectrum explicitly shows that non-triplen low-order harmonics up to the 13th order are eliminated at the output voltage.

Fig. 11.(a) Output line and phase voltage waveform. (b) Individual harmonic component. (c) Harmonic spectrum of the three-level inverter for MI of 0.8.

Fig. 12.(a) Output line and phase voltage waveform. (b) Individual harmonic component. (c) Harmonic spectrum of the three-level inverter for MI of 0.6.

Fig. 13 shows the two DC link capacitor voltages and the neutral point potential of the NPC inverter for MI of 0.8. The peak-to-peak neutral point voltage is 6.6 V for a DC input of 120 V and ±10 V as reported in [21] for the same MI and DC input using variable common mode injection PWM. These results prove that in the proposed method, natural balancing of the neutral point potential is achieved because of the optimum switching pattern.

Fig. 13.Neutral point potential variation in the NPC inverter.

 

VI. CONCLUSION

An improved FA was developed, and its capability to determine the switching angles required for selective harmonic elimination in a three-level NPC inverter was demonstrated. Aside from rendering the required amplitude of the fundamental voltage, the proposed methodology also achieves the balancing of the voltages across the capacitors of the DC link. With regard to the extended application of the proposed scheme, it can be utilized in converter blocks on either sides of HVDC links. Various FACTS devices, such as STATCOM and SSSC, can be configured in the NPC inverter using the proposed technique. FA is as good as other optimization algorithms but has the additional advantages of fast convergence toward a robust solution and easy implementation in MATLAB. The simulation and experimental verifications proved the effectiveness of the proposed approach.