• Korean Journal of Materials Research
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• v.8 no.7
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• pp.579-583
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• 1998

Silicide layer structures, agglomeration of silicide layers, and dopant redistributions for the Co/Ti bilayer sputter-deposited on the P-doped polycrystalline Si substrate and subjected to rapid thermal annealing were investigated and compared with those on the single Si substrate. The $CoSi_2$ phase transition temperature is higher and agglomeration of the silicide layer occurs more severely for the Co/Ti bilayer on the doped polycrystalline Si substrate than on the single Si substrate. Also, dopant loss by outdiffusion is much more significant on the doped polycrystalline Si substrate than on the single Si substrate. All of these differences are attributed to the grain boundary diffusion and heavier doping concentration in the polycrystalline Si. The layer structure after silicidation annealing of Co/ Tildoped - polycrystalline Si is polycrystalline CoSi,/polycrystalline Si, while that of Co/TiI( 100) Si is Co- Ti- Si/epi- CoSi,/(lOO) Si.

• Journal of the Korean Vacuum Society
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• v.9 no.4
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• pp.335-340
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• 2000

We investigated the role of the capping layers in the formation of the cobalt silicide in Co/Si systems with TiN and Ti capping layers and without capping layers. The Co/Si interfacial reactions and the phase transformations by the rapid thermal annealing (RTA) processes were observed by sheet resistance measurements, XRD, SIMS and TEM analyses for the clean silicon substrate as well as for the chemically oxidized silicon substrate by $H_2SO_4$. We observed the retardation of the cobalt disilicide formation in the Co/Si system with Ti capping layers. In the case of Co/$SiO_2$/Si system, cobalt silicide was formed by the Co/Si reaction due to with the dissociation of the oxide layer by the Ti capping layers.

• Journal of the Microelectronics and Packaging Society
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• v.13 no.1 s.38
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• pp.1-5
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• 2006

We prepared 80 nm-thick TiSix on each 70 nm-thick amorphous silicon and polysilicon substrate using an RF sputtering with $TiSi_2$ target. TiSix composite silicide layers were stabilized by rapid thermal annealing(RTA) of $800^{\circ}C$ for 20 seconds. Line width of $0.5{\mu}m$ patterns were embodied by photolithography and dry etching process, then each additional annealing process at $750^{\circ}C\;and\;850^{\circ}C$ for 3 hours was executed. We investigated the change of sheet resistance with a four-point probe, and cross sectional microstructure with a field emission scanning electron microscope(FE-SEM) and transmission electron microscope(TEM), respectively. We observe an abrupt change of resistivity and voids at the silicide surface due to interdiffusion of silicide and composite titanium silicide in the amorphous substrates with additional $850^{\circ}C$ annealing. Our result implies that the electrical resistance of composite titanium silicide may be tunned by employing appropriate substrates and annealing condition.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.11a
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• pp.15-16
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• 2006

The thermal stability of nickel silicide with compressively and tensilely stressed nitride capping layer has been investigated in this study. The Ni (10 nm) and Ni/Co/TiN (7/3/25 nm) structures were deposited on the p-type Si substrate. The stressed capping layer was deposited using plasma enhanced chemical vapor deposition (PECVD) after silicide formation by one-step rapid thermal process (RTP) at $500^{\circ}C$ for 30 sec. It was found that the thermal stability of nickel silicide depends on the stress induced by the nitride capping layer. In the case of Ni (10 nm) structure, the high compressive sample shows the best thermal stability, whereas in the case of Ni/Co/TiN (7/3/25 nm) structure, the high compressive sample shows the worst thermal stability.

• Transactions on Electrical and Electronic Materials
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• v.9 no.2
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• pp.47-51
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• 2008

In this paper, thermal stability of Nickel silicide formed on p-type silicon wafer using Ni-V alloy film was studied. As compared with pure Ni, Ni-V shows better thermal stability. The addition of Vanadium suppresses the phase transition of NiSi to $NiSi_2$ effectively. Ni-V single structure shows the best thermal stability compared with the other Ni-silicide using TiN and Co/TiN capping layers. To enhance the thermal stability up to $650^{\circ}C$ and find out the optimal thickness of Ni silicide, different thickness of Ni-V was also investigated in this work.

• Journal of Powder Materials
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• v.6 no.1
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• pp.103-110
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• 1999

Different sizes of Si powder and milling medium materials (steel and partially stabilized zirconia (PSZ)) were used to synthesize $Ti_3Si$ and $TiSi_2$ by mechanical aollying (MA) of Ti-25.0.at.%Si and Ti-66.7at.% Si powder mixtures. the formation of each titanium silicide did not occur even after 360 min of MA of as-re-ceived Si and Ti powder mixtures due to the lack of homogeneity. $Ti_3Si$, however, was synthesized after 240 min of MA of Ti and 60 min-premilled Si powder mixture. ${\alpha}-TiSi_2$ and $TiSi_2$ were produced by jar milling of Ti and 60 min-premilled Si powder mixture for 48 hr and high -energy PSZ ball-milling in a steel vial for 360 min. The formation of each titanium silicide was characterized by a slow reaction rate as the reactants and product(s) coexisted for a certain period of time. The formation of $Ti_3Si$ and $TiSi_2$ and the reaction rates appeared to be influenced by the Si particle size, the homogeneity of the powder mixtures and the milling medium materials.

• Korean Journal of Materials Research
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• v.8 no.4
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• pp.288-292
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• 1998

The p*-n ultra shallow junction diode with Co/Ti bilayer silicide was formed by ion implantation of $BF_{2}$ energy : 30KeV, dose : $5\times10^{15}cm^{-2}$] onto the n-well Si(100) region and RTA-silicidation of the evaporated Co($120\AA$)/Ti($40\AA$) double layer. The fabricated diode exhibited ideality factor of 1.06, specific contact resistance of $1.2\times10^{-6}\Omega\cdot\textrm{cm}^2$ and leakage current of $8.6\muA/\textrm{cm}^2$(-3V) under the reverse bias of 3V. The sheet resistance of silicided emitter region, the boron concentration at silicide/Si interface and the junction depth including silicide layer of ($500\AA$ were about $8\Omega\Box$, $6\times10^{19}cm^{-3}$, and $0.14\mu{m}$, respectively. In the fabrication of diode, the application of Co/Ti bilayer silicide brought improvement of ideality factor on the current-voltage characteristics as well as reduction of emitter sheet resistance and specific contact resistance, while it led to a little increase of leakage current.

• Corrosion Science and Technology
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• v.7 no.4
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• pp.233-236
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• 2008

Halide-activated pack cementation was utilized to deposit B-doped silicide coating. The pack powders were consisted of $3Wt.c/oNH_4Cl$, 7Wt.c/oSi, $90Wt.c/oAl_2O_3+TiB_2$. B-doped silicide coating was consisted of two layers, an outer layer of $NbSi_2$ and an inner layer of $Nb_5Si_3$. Isothermal oxidation resistance of B-doped silicide coating was tested at $1250^{\circ}C$ in static air. B-doped silicide coating had excellent oxidation resistance, because continuous $SiO_2$ scale which serves as obstacle of oxygen diffusion was formed after oxidation.

• Proceedings of the Materials Research Society of Korea Conference
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• 1993.05a
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• pp.64-65
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• 1993

MPB 조성영역인 Zr/Ti=52/48의 composite ceramic target을 사용하여 RF magnetron sputtering 방법으로 기판온도 약 30$0^{\circ}C$에서 RZT 박막을 Pt/Ti/Si 기판위에 증착시켰다. 안정상인 perovskite 구조를 형성시키기 위하여 PbO분위기에서 furnace annealing 과 Repid thermal annealing을 실시하여 열처리 방법에 따른 상형성 및 계면반응과 그에 따른 전기적 특성을 고찰 하였다. Pt 의 두께가 250$\AA$인 경우 furnace annealing 시 $650^{\circ}C$에서 perouskite 상이 형성되었으나 Pt층이 산소의 확산을 방지하지 못하여 상부의 Ti 층이 TiOx로 변태하였으며 하부의 Ti는 Si 과 반응하여 Ti-silicide 롤 변태하였다. 또한 75$0^{\circ}C$,60sec 인 경우 Pt 층의 응집화가 관찰되어 하부전극으로서 적용이 적절하지 못하다. 급속열처리를 실시한 경우에도 마찬가지로 Ti 층이 TiOx 와 silicide 층으로 변태되었다. Pt의 두께가 1000$\AA$인 경우에도 250$\AA$와는 달리 RTA 시 (III)방향으로 Furace annealing 시(001)방향으로 우선 성장하였다. 이는 Ti(001), P(111),PZT(111)면의 lattic mismatch 가 매우 작은데다 RTA 시 계면반응이 거의발생하지 않아 PZT 박막이 (111) 방향으로 우선 성장한 것으로 보인다. Furnace annealing 경우는 심한 계면반응이 발생하여 Pt층에 어느 정도 영향을 주었기 때문에 우선성장 방향이 바뀌었다구 생각한다.

• Korean Journal of Materials Research
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• v.6 no.8
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• pp.808-816
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• 1996

(100) Si 기판위에 전자 빔 증착법을 이용하여$ 90\AA$두께의 Ti과 $120\AA$두께의 Co를 순차적으로 증착시켰다. 그 후 질소분위기하의 $350-900^{\circ}C$온도구간에서 급속열처리함으로써 (100) Si 기판위의 Co/Ti 이중 박막의 실리사이드화 반응이 일어나게 했으며 이를 XRD, AES, TEM을 이용하여 분석하였다. $500^{\circ}C$이하의 온도에서는 Co원자들이 Ti층쪽으로 빠르게 확산하여 Si와 반응하기 이전에 Ti원자들과 상호 혼합되어 어떠한 실리사이드도 형성되지 않았다. $500^{\circ}C$에서 열처리된 시편의 고분해능전자현미경 영상을 통해 Co-Ti 혼합층과 실리콘 기판과의 계면에서 (100)Si 기판과 정합관계를 가지는 CoSi2가 형성되었음을 확인했다. $600^{\circ}C$열처리에 의해 Co-Ti-Sitka성분 실리사이드가 형성되기 시작하였으며, 형성된 삼성분 실리사이드는 Ti의 out-diffusion에 의해 $900^{\circ}C$ 이상의 온도에서는 불안정하였다. Co/Ti이중 박막에 의해 형성된 CoSi2는 실리콘 기판과 평탄한 계면을 가지며 실리콘 기판에 대해 (100)우선성장방위를 가졌다.