• 제목/요약/키워드: ThreeStep Process

검색결과 704건 처리시간 0.022초

VLSI 구현을 위한 CAN 프로토콜 컨트롤러의 설계 및 검증 (Design and Verification of a CAN Protocol Controller for VLSI Implementation)

  • 김남섭;조원경
    • 대한전자공학회논문지SD
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    • 제43권2호
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    • pp.96-104
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    • 2006
  • 본 논문에서는 VLSI구현을 위한 CAN 프로토콜 컨트롤러의 최적화된 구조를 제안하였으며, 제안된 구조를 이용하여 VLSI로 구현하였다. 또한 많은 시간이 소요되는 검증의 문제점을 보완하기 위하여 3단계 검증기법을 제안하였으며 이를 통하여 빠른 속도의 검증이 가능하게 되었다. 제안된 구조는 기존의 CAN 프로토콜 컨트롤러보다 적은 사이즈의 게이트 수를 갖고 있을 뿐만 아니라 호스트 프로세서와의 연결이 용이하게 구성되어 있기 때문에 비용 및 효율성에서 장점을 갖고 있고, 제안된 3단계 검증기법은 반복되는 검증의 수를 줄임으로써 최적화된 검증을 수행하도록 구성되어 있기 때문에 빠른 속도의 검증이 가능하다. 설계된 CAN 프로토콜 컨트롤러는 0.35마이크론 CMOS공정을 이용하여 제작되었다.

절삭가공에 의한 금속 쾌속 시작품 제작기술 (The Manufacturing Technique of Metal Rapid Products by the Milling Process)

  • 신보성;최두선;이응숙;이동주;이종현
    • 한국정밀공학회:학술대회논문집
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    • 한국정밀공학회 2000년도 춘계학술대회 논문집
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    • pp.759-762
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    • 2000
  • In order to reduce lead-time and cost, recently the technology of Rapid Prototyping and Manufacturing (PR/M) has been used widely. So various RP/M methods have been developed and these systems commercialized several years ago. But we have carried out rapid product, such as sphere, by the milling process instead of RP system. in the case of sphere with three-dimensional shape. the machining method using conventional milling machine has resulted in some troubles because of its deformation and lack of stiffness which is due to usual work piece set up method. In this paper, the feasibility of milling process which is divided into two steps such as the-upper-and-1ower-face milling process using supporting material were investigated and suggested.

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신호시스템 시운전 시험 연구 (A Study on Test Working of Signalling System)

  • 정의진;황종규;이종우
    • 한국철도학회:학술대회논문집
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    • 한국철도학회 2000년도 춘계학술대회 논문집
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    • pp.157-163
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    • 2000
  • Testing evaluation is a part of process for design, production, evaluation, operation and abolition, and is the process of certifying system performance. The main purpose of testing evaluation is to reduce the risk factor under the determining process. Testing process has the three step such as design qualification, integration and validation test in factory, system integration and commissioning test. Design Qualification is to verify errors on the design process. Integration and validation test in factory is for the H/W and S/W of an equipment and is to verify interface of subsystem, communication protocol and main functions. System integration and commissioning test is a functional test to adjust successful installation of equipment. According to the testing process, briefly consideration for test item, test method and test contents about signalling system is carried out.

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XML 스키마 매칭 기법을 이용한 구조설계 문서구조 표준화 방법론 (A methodology for the standardization of structural design document structure using XML schema matching technique)

  • 김봉근;정연석;김동현;이상호
    • 한국전산구조공학회:학술대회논문집
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    • 한국전산구조공학회 2006년도 정기 학술대회 논문집
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    • pp.200-207
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    • 2006
  • A new formal standardization methodology of the structural design document information is proposed in this paper. The standardization process is divided into three steps: pre-process of the collected sample document (CSD), construction of the document structure, and definition of the occurrence of each element in the document. During the pre-process, the detail document contents in the CSD are indexed with templates defined in this study, and the indexed CSD is translated into XML Schema (XSD) formal Afterwards the degree of confidences of all elements between the temporary standard document (TSD) and the translated CSD are calculated by using the XML schema matching algorithm; the TSD is then updated. This second step is repeated until all of the CSD are compared. In the final step, the common elements and unbounded elements are extracted by determining the occurrence of the temporary document elements, and the standardized document schema is exported in the XSD format. The case study dealing with the structural calculation documents show that the ,proposed methodology can be effectively used to build a XML -based information model of structural design documents.

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Simplified SVPWM that Integrates Overmodulation and Neutral Point Potential Control

  • Zhu, Rong-Wu;Wu, Xiao-Jie
    • Journal of Power Electronics
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    • 제14권5호
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    • pp.926-936
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    • 2014
  • A simplified and effective space vector pulse-width modulation (SVPWM) algorithm with two and three levels for three-phase voltage-source converters is proposed in this study. The proposed SVPWM algorithm only uses several linear calculations on three-phase modulated voltages without any complicated trigonometric calculations adopted by conventional SVPWM. This simplified SVPWM also avoids choosing the vector sector required by conventional SVPWM. A two-level overmodulation scheme is integrated into the proposed two-level SVPMW to generate the output voltage that increases from a linear region to a six-step state with a smoothly linear transition characteristic and a simple overmodulation process without a lookup table and complicated nonlinear functions. The three-level SVPWM with a proportional-integral controller effectively balances the neutral point potential of the neutral point clamped converter. Results from the simulation in MATLAB/Simulink and the experiment based on a digital signal processor are provided to clearly demonstrate the validity and effectiveness of the proposed strategies.

Wafer-Level Three-Dimensional Monolithic Integration for Intelligent Wireless Terminals

  • Gutmann, R.J.;Zeng, A.Y.;Devarajan, S.;Lu, J.Q.;Rose, K.
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제4권3호
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    • pp.196-203
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    • 2004
  • A three-dimensional (3D) IC technology platform is presented for high-performance, low-cost heterogeneous integration of silicon ICs. The platform uses dielectric adhesive bonding of fully-processed wafer-to-wafer aligned ICs, followed by a three-step thinning process and copper damascene patterning to form inter-wafer interconnects. Daisy-chain inter-wafer via test structures and compatibility of the process steps with 130 nm CMOS sal devices and circuits indicate the viability of the process flow. Such 3D integration with through-die vias enables high functionality in intelligent wireless terminals, as vertical integration of processor, large memory, image sensors and RF/microwave transceivers can be achieved with silicon-based ICs (Si CMOS and/or SiGe BiCMOS). Two examples of such capability are highlighted: memory-intensive Si CMOS digital processors with large L2 caches and SiGe BiCMOS pipelined A/D converters. A comparison of wafer-level 3D integration 'lith system-on-a-chip (SoC) and system-in-a-package (SiP) implementations is presented.

레일리 페이딩 채널에서 WCDMA의 단계별 병렬 처리 셀 탐색의 성능 해석 (Performance Analysis of Stepwise Parallel Processing for Cell Search in WCDMA over Rayleigh Fading Channels)

  • 송문규
    • 한국통신학회논문지
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    • 제27권2B호
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    • pp.125-136
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    • 2002
  • 셀간 비동기 방식의 WCDMA 시스템에서 셀간 동기를 맞추는 일은 매우 중요하며, 3 단계 셀탐색 과정에 의해 수행된다. 셀 탐색은 셀 탐색 시간을 줄이기 위해 각 단계가 파이프라인으로 동작하는 단계별 병렬 처리 방식으로 동작할 수 있다. 각 단계에서 실행 시간을 동일하게 설정할 경우 2단계는 최소한 1프레임의 처리시간을 소요하므로 1단계와 3단계에서 과도한 누적이 야기된다. 일반적으로 누적의 횟수가 증가할수록 사후적분 검파의 잇점은 감소한다. 따라서 단계별 병렬 처리로 인한 성능 개선은 그다지 크지 않다. 본 논문에서는 레일리 페이딩 채널에서 WCDMA 시스템에 대한 셀 탐색의 단계별 병렬 처리의 성능을 해석한다. 본 해석을 통해 각 단계에서 사후 검파 적분의 횟수와 채널간 전력 할당비 등 셀 탐색 파라미터에 대한 영향을 조사한다. 또한 각 단계의 처리 시간을 적절히 조절함으로써 단계별 병렬 처리 셀 탐색의 성능을 개선하고, 관례적인 단계별 직렬 처리 방식과 성능을 비교한다.

로봇의 최단경로탐색을 위한 미로의 순회 및 표현방법 설계 (A Design of Traverse and Representation Method of Maze for Shortest Path Search with Robots)

  • 홍기천
    • 한국정보교육학회:학술대회논문집
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    • 한국정보교육학회 2010년도 하계학술대회
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    • pp.227-233
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    • 2010
  • 그래프는 현재 GIS, 네트워크, 인공지능 등과 같은 다양한 분야에 응용되고 있다. 우리의 일상에서도 여행등과 같은 상황에서 무의식중에 그래프의 개념을 사용하고 있다. 그래서 본 논문에서는 미로내에서 로봇이 서로다른 두 개의 정점간 최단경로를 탐색할 때, 그래프라는 개념이 어떻게 사용되는지에 대해서 알아보고자한다. 우리가 자료구조 과목에서 배웠던 내용처럼 이상적인 상황이 아니고 좀더 현실적인 상황이다. 로봇이 최단경로탐색이라는 미션을 수행하기 위해서는 미로순회, 그래프 생성, 최단경로탐색의 세 단계를 거친다. 미로순회 단계는 로봇이 직접 미로를 탐색해야하는 단계로서 가장 어려움이 많은 단계라고 볼 수 있다. 그래프 생성 단계는 로봇이 미로가 가지는 구조적인 정보를 그래프로 표현하고, 이를 2차원 배열에 저장하는 단계이다. 최단경로탐색단계는 서로 다른 두 개의 정점을 입력하여 로봇이 실제로 이동하도록 하는 단계이다. 아직 구현이 완료된 상황이 아니기 때문에 로봇의 최단경로탐색을 위한 전체 과정의 설계에 대해서만 기술하기로 한다.

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Multilayered Graphene Electrode using One-Step Dry Transfer for Optoelectronics

  • Lee, Seungmin;Jo, Yeongsu;Hong, Soonkyu;Kim, Darae;Lee, Hyung Woo
    • Current Optics and Photonics
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    • 제1권1호
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    • pp.7-11
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    • 2017
  • In this study, multilayered graphene was easily transferred to the target substrate in one step using thermal release tape. The transmittance of the transferred graphene according to the number of layers was measured using a spectrophotometer. The sheet resistance was measured using a four-point probe system. Graphene formed using this transfer method showed almost the same electrical and optical properties as that formed using the conventional poly (methyl methacrylate) transfer method. This method is suitable for the mass production of graphene because of the short process time and easy large-area transfer. In addition, multilayered graphene can be transferred on various substrates without wetting problem using the one-step dry transfer method. In this work, this easy transfer method was used for dielectric substrates such as glass, paper and polyethylene terephthalate, and a sheet resistance of ~240 ohm/sq was obtained with three-layer graphene. By fabricating organic solar cells, we verified the feasibility of using this method for optoelectronic devices.

건설공사 발주 공공기관의 안전점검 체계구축에 관한 연구 (Establishment of a Safety Inspection System for Public Institutions Ordered Construction Projects)

  • 박응호;이수동;정기효
    • 대한안전경영과학회지
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    • 제25권3호
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    • pp.55-62
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    • 2023
  • Public institutions have a responsibility to ensure the safety of their employees and the public. One way to do this is to implement a systematic safety inspection system based on risk assessments and continuous improvements. This study developed a systematic safety inspection system for public institutions that are ordered construction projects. The proposed system in this study consists of a three-step process: (1) developing safety grade evaluation tables, (2) preparing and conducting safety inspections, and (3) evaluating and improving safety management grades. The first step is to develop safety grade evaluation tables by analysis and diagnosis of the construction site's work type, disaster statistics, and related laws. The second step is to conduct safety inspections using the developed evaluation tables. The third step is to determine the safety management grade based on the results of the safety inspection, and to improve risk factors found during the safety evaluation. The proposed system was implemented in highway construction projects carried out by public institutions. The results showed that the proposed system has two major effects: (1) reducing accident-related deaths and injuries, (2) improving safety management levels by continuous evaluation and improvement. The proposed system can be utilized in construction projects ordered by public institutions to improve the level of occupational safety and health.